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4 changes: 3 additions & 1 deletion samples/subsys/ipc/ipc_service/icmsg/CMakeLists.txt
Original file line number Diff line number Diff line change
Expand Up @@ -11,7 +11,9 @@ find_package(Zephyr REQUIRED HINTS $ENV{ZEPHYR_BASE})
if(NOT CONFIG_BOARD_NRF5340DK_NRF5340_CPUAPP AND
NOT CONFIG_BOARD_NRF5340BSIM_NRF5340_CPUAPP AND
NOT CONFIG_BOARD_STM32H747I_DISCO AND
NOT CONFIG_BOARD_NRF54L15DK_NRF54L15_CPUAPP)
NOT CONFIG_BOARD_NRF54H20DK_NRF54H20_CPUAPP AND
NOT CONFIG_BOARD_NRF54L15DK_NRF54L15_CPUAPP AND
NOT CONFIG_BOARD_NRF54LM20DK_NRF54LM20A_CPUAPP)
message(FATAL_ERROR "${BOARD} is not supported for this sample")
endif()

Expand Down
4 changes: 3 additions & 1 deletion samples/subsys/ipc/ipc_service/icmsg/Kconfig.sysbuild
Original file line number Diff line number Diff line change
Expand Up @@ -5,8 +5,10 @@
source "share/sysbuild/Kconfig"

config REMOTE_BOARD
string
string "The board used for remote target"
default "nrf5340dk/nrf5340/cpunet" if $(BOARD) = "nrf5340dk"
default "nrf5340bsim/nrf5340/cpunet" if $(BOARD) = "nrf5340bsim"
default "nrf54h20dk/nrf54h20/cpuppr" if BOARD_NRF54H20DK_NRF54H20_CPUAPP
default "nrf54l15dk/nrf54l15/cpuflpr" if $(BOARD) = "nrf54l15dk"
default "nrf54lm20dk/nrf54lm20a/cpuflpr" if $(BOARD) = "nrf54lm20dk"
default "stm32h747i_disco/stm32h747xx/m4" if $(BOARD) = "stm32h747i_disco"
Original file line number Diff line number Diff line change
@@ -0,0 +1,25 @@
/*
* Copyright (c) 2025 Nordic Semiconductor ASA
* SPDX-License-Identifier: Apache-2.0
*/

/* Replace default ipc0 instance */
/delete-node/ &ipc0;

ipc0: &cpuapp_cpuppr_ipc {
status = "okay";
};

&cpuppr_vevif {
status = "okay";
};

&cpuapp_bellboard {
status = "okay";
};

/ {
chosen {
/delete-property/ zephyr,bt-hci;
};
};
Original file line number Diff line number Diff line change
@@ -0,0 +1,42 @@
/*
* Copyright (c) 2025 Nordic Semiconductor ASA
*
* SPDX-License-Identifier: Apache-2.0
*/

/ {
soc {
reserved-memory {
#address-cells = <1>;
#size-cells = <1>;

sram_rx: memory@20057c00 {
reg = <0x20057c00 0x8000>;
};

sram_tx: memory@2005fc00 {
reg = <0x2005fc00 0x8000>;
};
};
};

ipc {
ipc0: ipc0 {
compatible = "zephyr,ipc-icmsg";
dcache-alignment = <32>;
tx-region = <&sram_tx>;
rx-region = <&sram_rx>;
mboxes = <&cpuapp_vevif_rx 20>, <&cpuapp_vevif_tx 21>;
mbox-names = "rx", "tx";
status = "okay";
};
};
};

&cpuapp_vevif_rx {
status = "okay";
};

&cpuapp_vevif_tx {
status = "okay";
};
Original file line number Diff line number Diff line change
@@ -0,0 +1,44 @@
/*
* Copyright (c) 2025 Nordic Semiconductor ASA
*
* SPDX-License-Identifier: Apache-2.0
*/

/ {
soc {
reserved-memory {
#address-cells = <1>;
#size-cells = <1>;

sram_rx: memory@20057c00 {
reg = <0x20057c00 0x8000>;
};

sram_tx: memory@2005fc00 {
reg = <0x2005fc00 0x8000>;
};
};
};

ipc {
ipc0: ipc0 {
compatible = "zephyr,ipc-icbmsg";
dcache-alignment = <32>;
tx-region = <&sram_tx>;
rx-region = <&sram_rx>;
tx-blocks = <16>;
rx-blocks = <18>;
mboxes = <&cpuapp_vevif_rx 20>, <&cpuapp_vevif_tx 21>;
mbox-names = "rx", "tx";
status = "okay";
};
};
};

&cpuapp_vevif_rx {
status = "okay";
};

&cpuapp_vevif_tx {
status = "okay";
};
Original file line number Diff line number Diff line change
@@ -0,0 +1,17 @@
#
# Copyright (c) 2025 Nordic Semiconductor ASA
#
# SPDX-License-Identifier: Apache-2.0
#
################################################################################

CONFIG_LOG=y
CONFIG_LOG_MODE_MINIMAL=y
CONFIG_ASSERT=n
CONFIG_LOG_BACKEND_UART=n

CONFIG_BOOT_BANNER=n
CONFIG_EARLY_CONSOLE=y
CONFIG_HEAP_MEM_POOL_SIZE=1024

CONFIG_SIZE_OPTIMIZATIONS=y
Original file line number Diff line number Diff line change
@@ -0,0 +1,20 @@
/*
* Copyright (c) 2025 Nordic Semiconductor ASA
* SPDX-License-Identifier: Apache-2.0
*/

ipc0: &cpuapp_cpuppr_ipc {
status = "okay";
};

&cpuppr_vevif {
status = "okay";
};

&cpuapp_bellboard {
status = "okay";
};

&uart135 {
/delete-property/ hw-flow-control;
};
Original file line number Diff line number Diff line change
@@ -0,0 +1,46 @@
/*
* Copyright (c) 2025 Nordic Semiconductor ASA
*
* SPDX-License-Identifier: Apache-2.0
*/

/ {
soc {
reserved-memory {
#address-cells = <1>;
#size-cells = <1>;

sram_tx: memory@20057c00 {
reg = <0x20057c00 0x8000>;
};

sram_rx: memory@2005fc00 {
reg = <0x2005fc00 0x8000>;
};
};
};

ipc {
ipc0: ipc0 {
compatible = "zephyr,ipc-icmsg";
dcache-alignment = <32>;
tx-region = <&sram_tx>;
rx-region = <&sram_rx>;
mboxes = <&cpuflpr_vevif_rx 21>, <&cpuflpr_vevif_tx 20>;
mbox-names = "rx", "tx";
status = "okay";
};
};
};

&cpuflpr_vevif_rx {
status = "okay";
};

&cpuflpr_vevif_tx {
status = "okay";
};

&uart30 {
/delete-property/ hw-flow-control;
};
Original file line number Diff line number Diff line change
@@ -0,0 +1,48 @@
/*
* Copyright (c) 2025 Nordic Semiconductor ASA
*
* SPDX-License-Identifier: Apache-2.0
*/

/ {
soc {
reserved-memory {
#address-cells = <1>;
#size-cells = <1>;

sram_tx: memory@20057c00 {
reg = <0x20057c00 0x8000>;
};

sram_rx: memory@2005fc00 {
reg = <0x2005fc00 0x8000>;
};
};
};

ipc {
ipc0: ipc0 {
compatible = "zephyr,ipc-icbmsg";
dcache-alignment = <32>;
tx-region = <&sram_tx>;
rx-region = <&sram_rx>;
tx-blocks = <18>;
rx-blocks = <16>;
mboxes = <&cpuflpr_vevif_rx 21>, <&cpuflpr_vevif_tx 20>;
mbox-names = "rx", "tx";
status = "okay";
};
};
};

&cpuflpr_vevif_rx {
status = "okay";
};

&cpuflpr_vevif_tx {
status = "okay";
};

&uart30 {
/delete-property/ hw-flow-control;
};
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