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@anangl anangl commented Jul 15, 2025

Commits from Zephyr PR 93093 cherry-picked on top of the revision used by NCS v3.1.0-preview4.

manifest-pr-skip

anangl added 5 commits July 15, 2025 09:43
Get parameters for standard commands and requirements for enabling
Quad and Octal modes from dts uint8-arrays containing data read
from SFDP tables for particular flash chips.

Upstream PR #: 93093

Signed-off-by: Andrzej Głąbek <[email protected]>
- Use standard operation codes and parameters from SFDP for handling
  most of the used commands (except for read, write, and erase for now)
- Use common functions for reading and writing of status registers and
  for enabling write operations
- Switch IO mode in a common function that perfors a transfer and do
  it only when required for a given command

Upstream PR #: 93093

Signed-off-by: Andrzej Głąbek <[email protected]>
… handling of OER

Complete implementation of quad_enable_set() by adding support for all
possible Quad Enable Requirements (QER) as specified by the SFDP JEDEC
standard (JESD216). Add also corresponding octal_enable_set() to handle
Octal Enable Requirements.

Upstream PR #: 93093

Signed-off-by: Andrzej Głąbek <[email protected]>
Add implementation of the most common Soft Reset routine (sequence of
reset enable instruction 0x66 and reset instruction 0x99).

Upstream PR #: 93093

Signed-off-by: Andrzej Głąbek <[email protected]>
…ad disabling

Using a GPIO reset for a flash chip that has a dual function pin
(RESET# or SIO3) and is to be used in Quad mode is rather a bad idea
and so is clearing of the Quad Enable bit at every initialization
of the flash driver, since this bit is usually non-volatile, so such
operation means unnecessary wearing of the flash chip. Soft Reset
should be use instead in such case.

Upstream PR #: 93093

Signed-off-by: Andrzej Głąbek <[email protected]>
@carlescufi
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This was just a temporary cherry-pick.

@carlescufi carlescufi closed this Jul 30, 2025
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2 participants