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nRF54h20 pm s2ram resume redirect (bootloader -> App) #3252

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Merged
merged 2 commits into from
Sep 16, 2025
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nRF54h20 pm s2ram resume redirect (bootloader -> App) #3252

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3f771f2
[nrf noup] soc/nordic/nrf54h: Add extension to define custom s2ram im…
nvlsianpu Sep 5, 2025
d652dcd
[nrf noup] soc/nordic/nrf54h/pm_s2ram: S2RAM resume hardening
nvlsianpu Sep 5, 2025
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11 changes: 9 additions & 2 deletions boards/nordic/nrf54h20dk/nrf54h20dk_nrf54h20_cpuapp.dts
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Expand Up @@ -343,12 +343,19 @@ zephyr_udc0: &usbhs {

/* Trim this RAM block for making room on all run-time common S2RAM cpu context. */
&cpuapp_ram0 {
reg = <0x22000000 (DT_SIZE_K(32)-32)>;
ranges = <0x0 0x22000000 (0x8000-0x20)>;
reg = <0x22000000 (DT_SIZE_K(32) - 36)>;
ranges = <0x0 0x22000000 (0x8000 - 0x24)>;
};

/ {
soc {
/* run-time common mcuboot S2RAM support section */
mcuboot_s2ram: cpuapp_s2ram@22007fdc {
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having a look at the sdk-mcuboot PR this is basically completely duplicating retention's boot mode feature, any reason that wasn't used given it already has checksum/header validity and is already supported by mcuboot/doesn't need duplicate maintenance?

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Reason are that it is not another boot. From application execution it is perceived as resume from very deep sleep. Operation must be quick and low level. It must use limited resources. This section is for anty-glitch magic value recommended by Architect group. It is used for double check decision.

compatible = "zephyr,memory-region", "mmio-sram";
reg = <0x22007fdc 4>;
zephyr,memory-region = "mcuboot_s2ram_context";
};

/* run-time common S2RAM cpu context RAM */
pm_s2ram: cpuapp_s2ram@22007fe0 {
compatible = "zephyr,memory-region", "mmio-sram";
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4 changes: 3 additions & 1 deletion soc/nordic/nrf54h/CMakeLists.txt
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Expand Up @@ -8,7 +8,9 @@ if(CONFIG_ARM)
endif()
endif()

zephyr_library_sources_ifdef(CONFIG_PM_S2RAM pm_s2ram.c)
if(NOT CONFIG_SOC_NRF54H20_PM_S2RAM_OVERRIDE)
zephyr_library_sources_ifdef(CONFIG_PM_S2RAM pm_s2ram.c)
endif()

zephyr_include_directories(.)

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5 changes: 5 additions & 0 deletions soc/nordic/nrf54h/Kconfig
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Expand Up @@ -100,6 +100,11 @@ config SOC_NRF54H20_DISABLE_ALL_GPIO_RETENTION_WORKAROUND
default y
depends on SOC_NRF54H20_CPUAPP || SOC_NRF54H20_CPURAD

config SOC_NRF54H20_PM_S2RAM_OVERRIDE
bool "Override `pm_s2ram` implementation"
help
Override Nordic s2ram implementation.

config SOC_NRF54H20_CPURAD
select SOC_NRF54H20_CPURAD_COMMON

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14 changes: 14 additions & 0 deletions soc/nordic/nrf54h/pm_s2ram.c
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Expand Up @@ -219,10 +219,24 @@
#endif /* !defined(CONFIG_FPU_SHARING) */
#endif /* defined(CONFIG_FPU) */

#if DT_NODE_EXISTS(DT_NODELABEL(mcuboot_s2ram)) &&\
DT_NODE_HAS_COMPAT(DT_NODELABEL(mcuboot_s2ram), zephyr_memory_region)
/* Linker section name is given by `zephyr,memory-region` property of
* `zephyr,memory-region` compatible DT node with nodelabel `mcuboot_s2ram`.
*/
__attribute__((section(DT_PROP(DT_NODELABEL(mcuboot_s2ram), zephyr_memory_region))))
volatile struct mcuboot_resume_s _mcuboot_resume;

Check notice on line 229 in soc/nordic/nrf54h/pm_s2ram.c

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soc/nordic/nrf54h/pm_s2ram.c:229 
-#if DT_NODE_EXISTS(DT_NODELABEL(mcuboot_s2ram)) &&\
+#if DT_NODE_EXISTS(DT_NODELABEL(mcuboot_s2ram)) &&                                                 \
 	DT_NODE_HAS_COMPAT(DT_NODELABEL(mcuboot_s2ram), zephyr_memory_region)
 /* Linker section name is given by `zephyr,memory-region` property of
  * `zephyr,memory-region` compatible DT node with nodelabel `mcuboot_s2ram`.
  */
-__attribute__((section(DT_PROP(DT_NODELABEL(mcuboot_s2ram), zephyr_memory_region))))
-volatile struct mcuboot_resume_s _mcuboot_resume;
+__attribute__((
+	section(DT_PROP(DT_NODELABEL(mcuboot_s2ram),
+			zephyr_memory_region)))) volatile struct mcuboot_resume_s _mcuboot_resume;
#define SET_MCUBOOT_RESUME_MAGIC() _mcuboot_resume.magic = MCUBOOT_S2RAM_RESUME_MAGIC
#else
#define SET_MCUBOOT_RESUME_MAGIC()
#endif

int soc_s2ram_suspend(pm_s2ram_system_off_fn_t system_off)
{
int ret;

SET_MCUBOOT_RESUME_MAGIC();
scb_save(&backup_data.scb_context);
#if defined(CONFIG_FPU)
#if !defined(CONFIG_FPU_SHARING)
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6 changes: 6 additions & 0 deletions soc/nordic/nrf54h/pm_s2ram.h
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Expand Up @@ -10,6 +10,12 @@
#ifndef _ZEPHYR_SOC_ARM_NORDIC_NRF_PM_S2RAM_H_
#define _ZEPHYR_SOC_ARM_NORDIC_NRF_PM_S2RAM_H_

#define MCUBOOT_S2RAM_RESUME_MAGIC 0x75832419

struct mcuboot_resume_s {
uint32_t magic; /* magic value to identify valid structure */
};

/**
* @brief Save CPU state on suspend
*
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