Refactor instruction cost calculation

object-Object · object-Object · commit 42a4a61a6b68 · 2025-06-26T19:53:05.000-04:00
diff --git a/python/src/mlogv32/preprocessor/app.py b/python/src/mlogv32/preprocessor/app.py
@@ -93,7 +93,12 @@ def build(
     config = BuildConfig.load(yaml_path)
 
     worker_output = get_template_output_path(config.templates.worker)
-    worker_code = render_template(config.templates.worker, worker_output)
+    worker_code = render_template(
+        config.templates.worker,
+        worker_output,
+        instructions=config.instructions,
+        **config.inputs,
+    )
 
     labels = dict(iter_labels(parse_mlog(worker_code)))
 
@@ -103,6 +108,7 @@ def build(
         controller_output,
         instructions=config.instructions,
         labels=labels,
+        **config.inputs,
     )
 
     lookups_schem = cast(
diff --git a/python/src/mlogv32/preprocessor/models.py b/python/src/mlogv32/preprocessor/models.py
@@ -28,6 +28,7 @@ def _RelativePath_after(path: Path):
 class BuildConfig(BaseModel):
     templates: Templates
     schematics: Schematics
+    inputs: dict[str, Any]
     instructions: list[Instruction]
 
     class Templates(BaseModel):
diff --git a/src/cpu/config.yaml b/src/cpu/config.yaml
@@ -6,15 +6,19 @@ schematics:
   lookups: ../../schematics/lookup_procs.msch
   ram: ../../schematics/ram_proc.msch
 
+inputs:
+  # 46 (main) + 9 (end)
+  base_instruction_cost: 55
+
 instructions:
   - label: BEQ
     cost: 2
   - label: BNE
     cost: 2
   - label: JAL
-    cost: 1 + 9
+    cost: 1 + 9 + 2
   - label: JALR
-    cost: 3 + 8
+    cost: 3 + 8 + 2
   - label: BLT
     cost: 2 + 5 + 2
   - label: BGE
@@ -24,17 +28,17 @@ instructions:
   - label: BGEU
     cost: 1
   - label: LB
-    cost: 3 + 29
+    cost: 3 + 29 + 2
   - label: LH
-    cost: 3 + 29
+    cost: 3 + 29 + 2
   - label: LW
-    cost: 3 + 29
+    cost: 3 + 29 + 2
   - label: LUI
-    cost: 2
+    cost: 2 + 2
   - label: LBU
-    cost: 3 + 29
+    cost: 3 + 29 + 2
   - label: LHU
-    cost: 2 + 29
+    cost: 2 + 29 + 2
   - label: SB
     cost: 2 + 28
   - label: SH
@@ -46,7 +50,7 @@ instructions:
   - label: AMOSWAP.W
     cost: 1 + 52
   - label: LR.W
-    cost: 8 + 8 + 32
+    cost: 8 + 8 + 32 + 2
   - label: SC.W
     cost: 7 + 8
   - label: AMOXOR.W
@@ -64,77 +68,77 @@ instructions:
   - label: AMOMAXU.W
     cost: 2 + 52
   - label: ADDI
-    cost: 3
+    cost: 3 + 2
   - label: SUB
-    cost: 2 + 1 + 3
+    cost: 2 + 1 + 3 + 2
   - label: SLTI
-    cost: 1 + 2 + 5 + 1 + 2
+    cost: 1 + 2 + 5 + 1 + 2 + 2
   - label: SLTIU
-    cost: 2
+    cost: 2 + 2
   - label: XORI
-    cost: 2
+    cost: 2 + 2
   - label: SRA
-    cost: 1 + 5 + 6
+    cost: 1 + 5 + 6 + 2
   - label: ORI
-    cost: 2
+    cost: 2 + 2
   - label: ANDI
-    cost: 2
+    cost: 2 + 2
   - label: ADD
-    cost: 1 + 3
+    cost: 1 + 3 + 2
   - label: SLL
-    cost: 1 + 5
+    cost: 1 + 5 + 2
   - label: SLT
-    cost: 2 + 5 + 1 + 2
+    cost: 2 + 5 + 1 + 2 + 2
   - label: SLTU
-    cost: 1 + 2
+    cost: 1 + 2 + 2
   - label: XOR
-    cost: 1 + 2
+    cost: 1 + 2 + 2
   - label: SRL
-    cost: 1 + 2
+    cost: 1 + 2 + 2
   - label: OR
-    cost: 1 + 2
+    cost: 1 + 2 + 2
   - label: AND
-    cost: 1 + 2
+    cost: 1 + 2 + 2
   - label: MUL
-    cost: 7 + 9
+    cost: 7 + 9 + 2
   - label: MULH
-    cost: 2 + 13
+    cost: 2 + 13 + 2
   - label: MULHSU
-    cost: 3 + 13
+    cost: 3 + 13 + 2
   - label: MULHU
-    cost: 3 + 13
+    cost: 3 + 13 + 2
   - label: DIV
-    cost: 2 + 5 + 5
+    cost: 2 + 5 + 5 + 2
   - label: DIVU
-    cost: 5
+    cost: 5 + 2
   - label: REM
-    cost: 2 + 5 + 5
+    cost: 2 + 5 + 5 + 2
   - label: REMU
-    cost: 5
+    cost: 5 + 2
   - label: PRIV
     cost: 5
   - label: CSRRW
-    cost: 2 + 60 # probably an overestimate, but the CSR code is very complicated
+    cost: 2 + 60 + 3 # probably an overestimate, but the CSR code is very complicated
   - label: CSRRS
-    cost: 2 + 60
+    cost: 2 + 60 + 3
   - label: CSRRC
-    cost: 1 + 60
+    cost: 1 + 60 + 3
   - label: AUIPC
     cost: 3
   - label: CSRRWI
-    cost: 1 + 2 + 60
+    cost: 1 + 2 + 60 + 3
   - label: CSRRSI
-    cost: 1 + 2 + 60
+    cost: 1 + 2 + 60 + 3
   - label: CSRRCI
-    cost: 1 + 1 + 60
+    cost: 1 + 1 + 60 + 3
   - label: FENCE
     cost: 1
   - label: SLLI
-    cost: 5
+    cost: 5 + 2
   - label: SRLI
-    cost: 2
+    cost: 2 + 2
   - label: SRAI
-    cost: 5 + 6
+    cost: 5 + 6 + 2
   - label: ILLEGAL_OP
     cost: 0
   - label: MLOGSYS
diff --git a/src/cpu/controller.mlog.jinja b/src/cpu/controller.mlog.jinja
@@ -99,9 +99,10 @@ init_incr:
     # initialize label/cost tables
 
 #% for instruction in instructions
+    #% set cost = base_instruction_cost + instruction.cost
     # {{ instruction.label }}
     write {{labels[instruction.label]}} {{LABELS}} {{loop.index0}}
-    write {{instruction.cost}} {{COSTS}} {{loop.index0}}
+    write {{cost}} {{COSTS}} {{loop.index0}}
 #% endfor
 
     # initialize peripherals
@@ -362,7 +363,7 @@ set {{POWER_SWITCH}} null
 set {{PAUSE_SWITCH}} null
 set {{DISPLAY}} null
 set {{labels[instruction.label]}} null
-set {{instruction.cost}} null
+set {{cost}} null
 set {{loop.index0}} null
 # unused variables
 set _ UART_FIFO_MODULO
diff --git a/src/cpu/worker.mlog.jinja b/src/cpu/worker.mlog.jinja
@@ -5,8 +5,10 @@
 #%# constants
 
 #%# the slowest instruction seems to be AMOMIN.W in icache-covered memory
-#%# safety factor * (check_interrupts + main + 2 * (decode + decode_BRANCH + end_decode) + AMOMIN.W + store_ram_word_unchecked)
-#% set MAX_INSTRUCTION_ACCUMULATOR_USAGE = (1.05 * (8 + 46 + 2 * (23 + 16 + 33) + 59 + 21))|round(method="ceil")|int
+#% set slowest_op = (instructions|selectattr("label", "equalto", "AMOMIN.W")|first).cost
+
+#%# ... + check_interrupts + 2*(decode + decode_BRANCH + end_decode) + store_ram_word_unchecked
+#% set MAX_INSTRUCTION_ACCUMULATOR_USAGE = (base_instruction_cost + slowest_op + 8 + 2*(23 + 16 + 33) + 23)|round(method="ceil")|int
 
 #%# linked buildings
 #%# IMPORTANT: the buildings must be linked in the order shown here
@@ -184,25 +186,25 @@ main__read_icache:
 
     read delta {{COSTS}} index
     op sub accumulator accumulator delta
-    op sub accumulator accumulator 46 # worst case across both paths
 
     read @counter {{LABELS}} index
 
 # this is a normal length for a label
+# cost: 3
 end_instruction_with_rd_and_interrupts:
-    op sub accumulator accumulator 2
     set interrupts_pending true
     # continue into end_instruction_with_rd
 
 # most instructions with an output register jump here after completing successfully
 # writes value rd to register rd_id if rd_id is not x0
+# cost: 2
 end_instruction_with_rd:
-    op sub accumulator accumulator 3
     jump end_instruction equal rd_id 0
     write rd {{REGISTERS}} rd_id
     # continue into end_instruction
 
 # all instructions jump here after completing successfully
+# cost: 9 (included in base cost)
 end_instruction:
     # increment instret
     op add csr_minstret csr_minstret 1
@@ -222,7 +224,6 @@ end_instruction_trap:
     jump state->pause equal pc breakpoint_address
     jump state->pause equal single_step_enabled true
 
-    op sub accumulator accumulator 10
     jump ipt_overrun notEqual current_tick @tick
     jump next_tick lessThanEq accumulator {{MAX_INSTRUCTION_ACCUMULATOR_USAGE}}
     jump main notEqual interrupts_pending true
@@ -1080,16 +1081,16 @@ BGEU:
 
 # cost: dynamic
 conditional_branch:
-    op sub accumulator accumulator 11
+    op sub accumulator accumulator 12 # -1 because we know we won't be writing to rd
     set rd_id 0 # prevent end_instruction_with_rd from writing to a register
     # continue into unconditional_pc_relative_jump
 
-# cost: 9
+# cost: 9 + 2
 unconditional_pc_relative_jump:
     op add next_pc pc imm
     # continue into unconditional_jump
 
-# cost: 8
+# cost: 8 + 2
 unconditional_jump:
     op and next_pc next_pc 0xffffffff
 
@@ -1241,7 +1242,7 @@ store_value:
 
 # cost: dynamic
 store_ram_word_unchecked:
-    op sub accumulator accumulator 21
+    op sub accumulator accumulator 23
 
     # otherwise, store the new value
     op add ret @counter 1
@@ -1263,7 +1264,7 @@ store_ram_word_unchecked:
     # atomics are not supported for MMIO, so we don't need to write to rd here
     # however, rd_id is set regardless, so we can safely jump to end_instruction_with_rd_and_time_update
 store_mmio_word_unchecked:
-    op sub accumulator accumulator 10
+    op sub accumulator accumulator 13
 
     op sub _offset decode_address {{MMIO_START}}
 
@@ -1295,7 +1296,7 @@ store_mmio_word_unchecked:
     # Transmitter Holding Register
     # append value to queue
     # NOTE: we don't check for overflow here, see readme
-    op sub accumulator accumulator 6 # -2
+    op sub accumulator accumulator 3 # -5
 
     op add _index _tx_write {{UART_TX_START}}
     op and value value 0xff
@@ -1309,7 +1310,7 @@ store_mmio_word_unchecked:
     jump end_instruction always
 
 store_mmio_word_unchecked__uart_fcr:
-    op sub accumulator accumulator 6 # -2
+    op sub accumulator accumulator 3 # -5
 
     # FIFO Control Register
 
@@ -1754,7 +1755,7 @@ EBREAK:
 MRET:
     jump ILLEGAL_OP lessThan privilege_mode 0b11
 
-    op sub accumulator accumulator 11
+    op sub accumulator accumulator 14
     # ^ static cost ends here
 
     # set mstatus.MIE to mstatus.MPIE, set mstatus.MPIE to 1, set privilege_mode to mstatus.MPP, and set mstatus.MPP to U
