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@cjsha cjsha commented Dec 6, 2025

From this first commit, some parts might need to be rotated in the CPL file. JLCPCB was displaying many parts with incorrect orientation in their representation of parts populated on the PCB.

fix #2

@cjsha cjsha requested a review from jonnew December 6, 2025 06:28
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jonnew commented Dec 8, 2025

The power switch action is weak and probably it should be removed. The power switch is currently a cold switch that toggles the enable for generating VCC. However, isolated power is derived directly from VBUS:

image

Thus the power switch would do nothing in the case of e.g. some malfunction (remember that the user can actually program this thing themselves) and they would be forced to remove the USB cable anyway to turn the thing off. For this reason, the power switch actually adds confusion. IMO, the power switch should simply be removed as for fully USB power devices, its quite an uncommon motif. Try to think of a device that is powered by usb (no barrel or AC connection) and has a power switch.

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cjsha commented Dec 8, 2025

I took the switch circuit from the ephys test board without thinking enough about it, my bad

- Went to 4 layers
- Simplified GPIO interface and remove power connections since they are
  a recipe for disaster
- Independent SPI busses to each stimulator to allow simultaneous
  control
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cjsha commented Dec 12, 2025

From filcarv:

  1. The panels still say v0.18. I believe they should say revB.
  2. Put the Silkscreens on top of copper or no-copper. Sometimes the silk in the transitions between copper and no-copper looks very ugly and we need to discard some PCBs. image
  3. The panel is what users see first. The internal electronics may be outstanding, but the device’s look and feel is defined by the enclosure. Aligning labels with their corresponding holes/connectors may be a good practice for clarity and usability. image
  4. We've decoupled FED3.2's shield from ground. If you think this makes sense here as well, you can copy-paste the circuit from here (or, at least, use the same component cases because we already have them in stock). https://github.com/KravitzLabDevices/FED3/tree/main/Electronics/v7.6 image
  5. In the previous version the external connector (J1) was connected to pins that allow PWM, SPI, ADC, DAC, and I2C. It seems that it was intended to allow a further expansion to be very versatile. Does the current revB also allow for these?
  6. When "updating PCB from Schematic" I saw a list of "Changes to Be Applied". This means the schematic and layout are not synchronized? I'm not a KiCAD pro, maybe this observation doesn't make any sense. image
  7. What's the function of the !BOOT_SEL switch (SW3)?
  8. I don't think this comment is correct. I believe this should be for pins 66 and 67.
  9. The USB lines are going down (top-to-bottom) and up (bottom-to-top) during is way from the connector to the uP.
    I'm not sure if it's not a better idea to keep them in the same top layer. Maybe moving some QSPI line to bottom will make room to keep the USB lines in the top. image
  10. Please keep the SN label at the top. I'm sending two suggestions of placement. image

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cjsha commented Dec 12, 2025

  1. What's the function of the !BOOT_SEL switch (SW3)?

This button can be held while power cycling the rp mcu in order to enter the bootloader

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cjsha commented Dec 12, 2025

I addressed filcarv's feedback. Below are some notes on that feedback.


  1. We've decoupled FED3.2's shield from ground.

We've decided not to do this on stimjim revB.

  1. In the previous version the external connector (J1) was connected to pins that allow PWM, SPI, ADC, DAC, and I2C. It seems that it was intended to allow a further expansion to be very versatile. Does the current revB also allow for these?
  • PWM: ✅
  • I2C: ✅
  • DAC: ❌ not possible, no DAC on any RP MCU
  • ADC: ❌, though I can pin one out if necessary @jonnew @filcarv
  • SPI: we're using both dedicated SPI blocks in the RP2040, but they can probably find an SPI implementation using the PIO
  1. When "updating PCB from Schematic" I saw a list of "Changes to Be Applied". This means the schematic and layout are not synchronized? I'm not a KiCAD pro, maybe this observation doesn't make any sense.

I updated PCB from schematic. Even immediately after doing so, you'll probably get a bunch of lines with the designators of the parts that KiCAD is going to attempt to update. You can try again and see if the same thing occurs.

Everything else in the ten points provided were changed.


Here are the new panels btw:

Screenshot 2025-12-12 231430 Screenshot 2025-12-12 231443

Btw, the BNC PN is different but the old ones should still fit in the panel cutout.

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jonnew commented Dec 15, 2025

@filcarv With respect to point 4, the decoupling serves no purpose. This is because the Shield and ground or shorted inside the cable itself. So, if anything, the FED3's connection should be updated.

image

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cjsha commented Dec 18, 2025

jon said remove "rev. B" from the PCB panels. Those aren't rev. B, the inner PCB is.

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jonnew commented Jan 16, 2026

  1. Should the wire push terminals be removed? Its generally not a good idea to to parallel the outputs from an instrument, especially one that generally produces a current since the user might be tempted to plug two things in simultaneously. Instead of these two things, we could just provide the following:

https://www.walmart.com/ip/BNC-Video-Baluns-Adapter-BNC-Male-Connector-BNC-Male-Plug-to-2-Pin-Screw-Terminal-No-Solder-Wire-Clamp-BNC-Adapter/17669874377

I think to make changes minimal, I suggest simply marking the terminal block as DNP, removing it from the panel, and providing the above adapter with the device instead.

  1. The "Input X" BNC connectors should be called "Trigger X". This is because they can either serve as trigger inputs to start stimuli or outputs to mark when they occur depending on a selectable mode in the device.

  2. The "Program" Button should be labelled "Reset"

  3. Add one of these, or maybe some clip thing, near the USB entry to connect PCB to the panel.

https://www.mouser.com/ProductDetail/PEM/SMTRAM3-7-5ET?qs=l4Gc20tDgJIyk%252Bzis07rYw%3D%3D

jonnew and others added 3 commits January 16, 2026 18:54
- Mark parellel push terminals as DNP and remove openings from front
  panel
- Update panel designs
- Add M3 mouting block for electrically connecting panel and case to PCB
They were like 0.15mm misaligned on the y-axis
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cjsha commented Jan 17, 2026

The only change I made is fixing the curve on the upper right corner of the Ch.0/Ch.1 boxes. This is what the curve looked like before my commit:

curve

I also moved one of the trigger labels like 0.15mm so they're fully aligned. It wouldn't have been noticeable in any case, but I figured I might as well make them line up.


I decided to put the 3D assembly together just to confirm. I figure it's better to safer than sorry as OEPS is on their last stimjim already, don't wanna make a mistake here. The GND thread step file is not there, but it seems like it will align from taking measurements on the PCB and looking at the part's datasheet.

Screenshot 2026-01-16 200437 Screenshot 2026-01-16 201540 accidentally deleted some silkscreen on the bottom screenshot, but it looks good.

- Sent to fab
- Lots of manufacturability changes
- BOM consolidation
- Repo layout changed a bit to remove redundant information. e.g.
  datasheet links are embedded in schematic. BOM information embedded in
  schematic. etc
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jonnew commented Jan 20, 2026

This is now in production. Since this device is already distributed, I would suggest we don't merge this PR until the hardware has been verified and firmware has to be created to support it. I did create a release targeting f08c5cb since this version of the hardware will exist internally

https://github.com/open-ephys/stimjim/releases/tag/rev-b

- I would rather not put them on the same PCB separated by v-cuts or
  mouse bites since the milling quality matters for panels
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Move from Teensy to RP2350A

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