Make atomic memory barriers mandatory

The atomic memory barrier interface was de facto mandatory,
as none of the code making opal_atomic_mb() calls bother
with the ifdefs.  Since all the supported platforms have
atomic memory barrier implementations, just make them
required.

At the same time, clean up the code to reflect that there
are no longer non-inline versions of the memory barrier
assembly.

Signed-off-by: Brian Barrett <[email protected]>

Author: bwbarrett

opal/include/opal/sys/arm64/atomic.h

@@ -30,7 +30,6 @@
 #ifndef OPAL_SYS_ARCH_ATOMIC_H
 #define OPAL_SYS_ARCH_ATOMIC_H 1
 
-#define OPAL_HAVE_ATOMIC_MEM_BARRIER         1
 #define OPAL_HAVE_ATOMIC_COMPARE_EXCHANGE_32 1
 #define OPAL_HAVE_ATOMIC_SWAP_32             1
 #define OPAL_HAVE_ATOMIC_COMPARE_EXCHANGE_64 1
@@ -46,6 +45,7 @@
 #define OPAL_HAVE_ATOMIC_XOR_64              1
 #define OPAL_HAVE_ATOMIC_SUB_64              1
 
+
 /**********************************************************************
  *
  * Memory Barriers

opal/include/opal/sys/atomic.h

@@ -41,7 +41,6 @@
  * The following #defines will be true / false based on
  * assembly support:
  *
- *  - \c OPAL_HAVE_ATOMIC_MEM_BARRIER atomic memory barriers
  *  - \c OPAL_HAVE_ATOMIC_SPINLOCKS atomic spinlocks
  *
  * Note that for the Atomic math, atomic add/sub may be implemented as
@@ -95,7 +94,6 @@ typedef struct opal_atomic_lock_t opal_atomic_lock_t;
  * files if we need to specify them as inline or non-inline
  *
  *********************************************************************/
-#define OPAL_HAVE_INLINE_ATOMIC_MEM_BARRIER         1
 #define OPAL_HAVE_INLINE_ATOMIC_COMPARE_EXCHANGE_32 1
 #define OPAL_HAVE_INLINE_ATOMIC_COMPARE_EXCHANGE_64 1
 #define OPAL_HAVE_INLINE_ATOMIC_ADD_32              1
@@ -166,18 +164,12 @@ enum { OPAL_ATOMIC_LOCK_UNLOCKED = 0, OPAL_ATOMIC_LOCK_LOCKED = 1 };
 #        endif
 #    endif /* DOXYGEN */
 
+
 /**********************************************************************
  *
- * Memory Barriers - defined here if running doxygen or have barriers
- *                   but can't inline
+ * Memory Barriers
  *
  *********************************************************************/
-#    if !defined(OPAL_HAVE_ATOMIC_MEM_BARRIER) && !defined(DOXYGEN)
-/* no way to emulate in C code */
-#        define OPAL_HAVE_ATOMIC_MEM_BARRIER 0
-#    endif
-
-#    if defined(DOXYGEN) || OPAL_HAVE_ATOMIC_MEM_BARRIER
 /**
  * Memory barrier
  *
@@ -191,12 +183,7 @@ enum { OPAL_ATOMIC_LOCK_UNLOCKED = 0, OPAL_ATOMIC_LOCK_LOCKED = 1 };
  * generally grinding the memory controller's performance.  Use only
  * if you need *both* read and write barriers.
  */
-
-#        if OPAL_HAVE_INLINE_ATOMIC_MEM_BARRIER
-static inline
-#        endif
-    void
-    opal_atomic_mb(void);
+static inline void opal_atomic_mb(void);
 
 /**
  * Read memory barrier
@@ -207,12 +194,7 @@ static inline
  * next read.  Nothing is said about the ordering of writes when using
  * \c opal_atomic_rmb().
  */
-
-#        if OPAL_HAVE_INLINE_ATOMIC_MEM_BARRIER
-static inline
-#        endif
-    void
-    opal_atomic_rmb(void);
+static inline void opal_atomic_rmb(void);
 
 /**
  * Write memory barrier.
@@ -223,14 +205,8 @@ static inline
  * next write.  Nothing is said about the ordering of reads when using
  * \c opal_atomic_wmb().
  */
+static inline void opal_atomic_wmb(void);
 
-#        if OPAL_HAVE_INLINE_ATOMIC_MEM_BARRIER
-static inline
-#        endif
-    void
-    opal_atomic_wmb(void);
-
-#    endif /* defined(DOXYGEN) || OPAL_HAVE_ATOMIC_MEM_BARRIER */
 
 /**********************************************************************
  *

opal/include/opal/sys/atomic_stdc.h

@@ -7,6 +7,8 @@
  * Copyright (c) 2019-2021 Google, LLC. All rights reserved.
  * Copyright (c) 2019      Triad National Security, LLC. All rights
  *                         reserved.
+ * Copyright (c) 2022      Amazon.com, Inc. or its affiliates.
+ *                         All Rights reserved.
  * $COPYRIGHT$
  *
  * Additional copyrights may follow
@@ -30,8 +32,6 @@
 #    include <stdatomic.h>
 #    include <stdint.h>
 
-#    define OPAL_HAVE_ATOMIC_MEM_BARRIER 1
-
 #    define OPAL_HAVE_ATOMIC_COMPARE_EXCHANGE_32 1
 #    define OPAL_HAVE_ATOMIC_SWAP_32             1
 
@@ -58,6 +58,13 @@
 
 #    define OPAL_HAVE_ATOMIC_SPINLOCKS 1
 
+
+/**********************************************************************
+ *
+ * Memory Barriers
+ *
+ *********************************************************************/
+
 static inline void opal_atomic_mb(void)
 {
     atomic_thread_fence(memory_order_seq_cst);

opal/include/opal/sys/gcc_builtin/atomic.h

@@ -18,6 +18,8 @@
  * Copyright (c) 2018      Triad National Security, LLC. All rights
  *                         reserved.
  * Copyright (c) 2021      Google, LLC. All rights reserved.
+ * Copyright (c) 2022      Amazon.com, Inc. or its affiliates.
+ *                         All Rights reserved.
  * $COPYRIGHT$
  *
  * Additional copyrights may follow
@@ -33,7 +35,6 @@
  * Memory Barriers
  *
  *********************************************************************/
-#define OPAL_HAVE_ATOMIC_MEM_BARRIER 1
 
 #define OPAL_HAVE_ATOMIC_COMPARE_EXCHANGE_32 1
 #define OPAL_HAVE_ATOMIC_ADD_32              1
@@ -50,6 +51,12 @@
 #define OPAL_HAVE_ATOMIC_SUB_64              1
 #define OPAL_HAVE_ATOMIC_SWAP_64             1
 
+
+/**********************************************************************
+ *
+ * Memory Barriers
+ *
+ *********************************************************************/
 #if (OPAL_ASSEMBLY_ARCH == OPAL_X86_64) && defined (__GNUC__) && !defined(__llvm) && (__GNUC__ < 6)
     /* work around a bug in older gcc versions where ACQUIRE seems to get
      * treated as a no-op instead */

opal/include/opal/sys/powerpc/atomic.h

@@ -35,7 +35,6 @@
  * Define constants for PowerPC 64
  *
  *********************************************************************/
-#define OPAL_HAVE_ATOMIC_MEM_BARRIER 1
 
 #define OPAL_HAVE_ATOMIC_COMPARE_EXCHANGE_32 1
 #define OPAL_HAVE_ATOMIC_SWAP_32             1
@@ -55,6 +54,7 @@
 #define OPAL_HAVE_ATOMIC_XOR_64              1
 #define OPAL_HAVE_ATOMIC_SUB_64              1
 
+
 /**********************************************************************
  *
  * Memory Barriers

opal/include/opal/sys/x86_64/atomic.h

@@ -38,12 +38,12 @@
  * Define constants for AMD64 / x86_64 / EM64T / ...
  *
  *********************************************************************/
-#define OPAL_HAVE_ATOMIC_MEM_BARRIER 1
 
 #define OPAL_HAVE_ATOMIC_COMPARE_EXCHANGE_32 1
 
 #define OPAL_HAVE_ATOMIC_COMPARE_EXCHANGE_64 1
 
+
 /**********************************************************************
  *
  * Memory Barriers

test/asm/atomic_barrier.c

@@ -10,6 +10,8 @@
  * Copyright (c) 2004-2005 The Regents of the University of California.
  *                         All rights reserved.
  * Copyright (c) 2010      Cisco Systems, Inc.  All rights reserved.
+ * Copyright (c) 2022      Amazon.com, Inc. or its affiliates.
+ *                         All Rights reserved.
  * $COPYRIGHT$
  *
  * Additional copyrights may follow
@@ -24,8 +26,6 @@
 
 int main(int argc, char *argv[])
 {
-#if OPAL_HAVE_ATOMIC_MEM_BARRIER
-
     /* there really isn't a great way to test that the barriers
        actually barrier, but at least make sure they don't kill the
        machine.*/
@@ -35,7 +35,4 @@ int main(int argc, char *argv[])
     opal_atomic_wmb();
 
     return 0;
-#else
-    return 77;
-#endif
 }