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COLL/UCC: Fix initialization in non-blocking (v5.0.x) #13459

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COLL/UCC: Fix initialization in non-blocking (v5.0.x) #13459

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2 changes: 2 additions & 0 deletions .mailmap
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Original file line number Diff line number Diff line change
Expand Up @@ -137,3 +137,5 @@ George Katevenis <[email protected]>
Brian Barrett <[email protected]>

Andrii Bilokur <[email protected]> B-a-S <[email protected]>

Kento Hasegawa <[email protected]> hasegawa.kento <[email protected]>
3 changes: 2 additions & 1 deletion ompi/mca/coll/ucc/coll_ucc_allgather.c
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@@ -1,6 +1,7 @@

/**
* Copyright (c) 2021 Mellanox Technologies. All rights reserved.
* Copyright (c) 2025 Fujitsu Limited. All rights reserved.
* $COPYRIGHT$
*
* Additional copyrights may follow
Expand Down Expand Up @@ -98,7 +99,7 @@ int mca_coll_ucc_iallgather(const void *sbuf, int scount, struct ompi_datatype_t
mca_coll_ucc_req_t *coll_req = NULL;

UCC_VERBOSE(3, "running ucc iallgather");
COLL_UCC_GET_REQ(coll_req);
COLL_UCC_GET_REQ(coll_req, comm);
COLL_UCC_CHECK(mca_coll_ucc_allgather_init(sbuf, scount, sdtype,
rbuf, rcount, rdtype,
ucc_module, &req, coll_req));
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3 changes: 2 additions & 1 deletion ompi/mca/coll/ucc/coll_ucc_allgatherv.c
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@@ -1,6 +1,7 @@

/**
* Copyright (c) 2021 Mellanox Technologies. All rights reserved.
* Copyright (c) 2025 Fujitsu Limited. All rights reserved.
* $COPYRIGHT$
*
* Additional copyrights may follow
Expand Down Expand Up @@ -99,7 +100,7 @@ int mca_coll_ucc_iallgatherv(const void *sbuf, int scount,
mca_coll_ucc_req_t *coll_req = NULL;

UCC_VERBOSE(3, "running ucc iallgatherv");
COLL_UCC_GET_REQ(coll_req);
COLL_UCC_GET_REQ(coll_req, comm);
COLL_UCC_CHECK(mca_coll_ucc_allgatherv_init(sbuf, scount, sdtype,
rbuf, rcounts, rdisps, rdtype,
ucc_module, &req, coll_req));
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3 changes: 2 additions & 1 deletion ompi/mca/coll/ucc/coll_ucc_allreduce.c
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@@ -1,6 +1,7 @@

/**
* Copyright (c) 2021 Mellanox Technologies. All rights reserved.
* Copyright (c) 2025 Fujitsu Limited. All rights reserved.
* $COPYRIGHT$
*
* Additional copyrights may follow
Expand Down Expand Up @@ -89,7 +90,7 @@ int mca_coll_ucc_iallreduce(const void *sbuf, void *rbuf, int count,
mca_coll_ucc_req_t *coll_req = NULL;

UCC_VERBOSE(3, "running ucc iallreduce");
COLL_UCC_GET_REQ(coll_req);
COLL_UCC_GET_REQ(coll_req, comm);
COLL_UCC_CHECK(mca_coll_ucc_allreduce_init(sbuf, rbuf, count, dtype, op,
ucc_module, &req, coll_req));
COLL_UCC_POST_AND_CHECK(req);
Expand Down
3 changes: 2 additions & 1 deletion ompi/mca/coll/ucc/coll_ucc_alltoall.c
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@@ -1,6 +1,7 @@

/**
* Copyright (c) 2021 Mellanox Technologies. All rights reserved.
* Copyright (c) 2025 Fujitsu Limited. All rights reserved.
* $COPYRIGHT$
*
* Additional copyrights may follow
Expand Down Expand Up @@ -97,7 +98,7 @@ int mca_coll_ucc_ialltoall(const void *sbuf, int scount, struct ompi_datatype_t
mca_coll_ucc_req_t *coll_req = NULL;

UCC_VERBOSE(3, "running ucc ialltoall");
COLL_UCC_GET_REQ(coll_req);
COLL_UCC_GET_REQ(coll_req, comm);
COLL_UCC_CHECK(mca_coll_ucc_alltoall_init(sbuf, scount, sdtype,
rbuf, rcount, rdtype,
ucc_module, &req, coll_req));
Expand Down
3 changes: 2 additions & 1 deletion ompi/mca/coll/ucc/coll_ucc_alltoallv.c
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@@ -1,6 +1,7 @@

/**
* Copyright (c) 2021 Mellanox Technologies. All rights reserved.
* Copyright (c) 2025 Fujitsu Limited. All rights reserved.
* $COPYRIGHT$
*
* Additional copyrights may follow
Expand Down Expand Up @@ -100,7 +101,7 @@ int mca_coll_ucc_ialltoallv(const void *sbuf, const int *scounts,
mca_coll_ucc_req_t *coll_req = NULL;

UCC_VERBOSE(3, "running ucc ialltoallv");
COLL_UCC_GET_REQ(coll_req);
COLL_UCC_GET_REQ(coll_req, comm);
COLL_UCC_CHECK(mca_coll_ucc_alltoallv_init(sbuf, scounts, sdisps, sdtype,
rbuf, rcounts, rdisps, rdtype,
ucc_module, &req, coll_req));
Expand Down
3 changes: 2 additions & 1 deletion ompi/mca/coll/ucc/coll_ucc_barrier.c
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@@ -1,5 +1,6 @@
/**
* Copyright (c) 2021 Mellanox Technologies. All rights reserved.
* Copyright (c) 2025 Fujitsu Limited. All rights reserved.
* $COPYRIGHT$
*
* Additional copyrights may follow
Expand Down Expand Up @@ -48,7 +49,7 @@ int mca_coll_ucc_ibarrier(struct ompi_communicator_t *comm,
mca_coll_ucc_req_t *coll_req = NULL;

UCC_VERBOSE(3, "running ucc ibarrier");
COLL_UCC_GET_REQ(coll_req);
COLL_UCC_GET_REQ(coll_req, comm);
COLL_UCC_CHECK(mca_coll_ucc_barrier_init(ucc_module, &req, coll_req));
COLL_UCC_POST_AND_CHECK(req);
*request = &coll_req->super;
Expand Down
3 changes: 2 additions & 1 deletion ompi/mca/coll/ucc/coll_ucc_bcast.c
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@@ -1,5 +1,6 @@
/**
* Copyright (c) 2021 Mellanox Technologies. All rights reserved.
* Copyright (c) 2025 Fujitsu Limited. All rights reserved.
* $COPYRIGHT$
*
* Additional copyrights may follow
Expand Down Expand Up @@ -66,7 +67,7 @@ int mca_coll_ucc_ibcast(void *buf, int count, struct ompi_datatype_t *dtype,
mca_coll_ucc_req_t *coll_req = NULL;

UCC_VERBOSE(3, "running ucc ibcast");
COLL_UCC_GET_REQ(coll_req);
COLL_UCC_GET_REQ(coll_req, comm);
COLL_UCC_CHECK(mca_coll_ucc_bcast_init(buf, count, dtype, root,
ucc_module, &req, coll_req));
COLL_UCC_POST_AND_CHECK(req);
Expand Down
4 changes: 3 additions & 1 deletion ompi/mca/coll/ucc/coll_ucc_common.h
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@@ -1,5 +1,6 @@
/**
Copyright (c) 2021 Mellanox Technologies. All rights reserved.
Copyright (c) 2025 Fujitsu Limited. All rights reserved.
$COPYRIGHT$
Additional copyrights may follow
$HEADER$
Expand All @@ -25,7 +26,7 @@
} \
} while(0)

#define COLL_UCC_GET_REQ(_coll_req) do { \
#define COLL_UCC_GET_REQ(_coll_req, _comm) do { \
opal_free_list_item_t *item; \
item = opal_free_list_wait (&mca_coll_ucc_component.requests); \
if (OPAL_UNLIKELY(NULL == item)) { \
Expand All @@ -40,6 +41,7 @@
_coll_req->super.req_state = OMPI_REQUEST_ACTIVE; \
_coll_req->super.req_free = mca_coll_ucc_req_free; \
_coll_req->super.req_type = OMPI_REQUEST_COLL; \
_coll_req->super.req_mpi_object.comm = _comm; \
} while(0)

#define COLL_UCC_REQ_INIT(_coll_req, _req, _coll, _module) do{ \
Expand Down
3 changes: 2 additions & 1 deletion ompi/mca/coll/ucc/coll_ucc_gather.c
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Expand Up @@ -2,6 +2,7 @@
/**
* Copyright (c) 2021 Mellanox Technologies. All rights reserved.
* Copyright (c) 2022 NVIDIA Corporation. All rights reserved.
* Copyright (c) 2025 Fujitsu Limited. All rights reserved.
* $COPYRIGHT$
*
* Additional copyrights may follow
Expand Down Expand Up @@ -114,7 +115,7 @@ int mca_coll_ucc_igather(const void *sbuf, int scount, struct ompi_datatype_t *s
mca_coll_ucc_req_t *coll_req = NULL;

UCC_VERBOSE(3, "running ucc igather");
COLL_UCC_GET_REQ(coll_req);
COLL_UCC_GET_REQ(coll_req, comm);
COLL_UCC_CHECK(mca_coll_ucc_gather_init(sbuf, scount, sdtype, rbuf, rcount,
rdtype, root, ucc_module,
&req, coll_req));
Expand Down
3 changes: 2 additions & 1 deletion ompi/mca/coll/ucc/coll_ucc_gatherv.c
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Expand Up @@ -2,6 +2,7 @@
/**
* Copyright (c) 2021 Mellanox Technologies. All rights reserved.
* Copyright (c) 2022 NVIDIA Corporation. All rights reserved.
* Copyright (c) 2025 Fujitsu Limited. All rights reserved.
* $COPYRIGHT$
*
* Additional copyrights may follow
Expand Down Expand Up @@ -106,7 +107,7 @@ int mca_coll_ucc_igatherv(const void *sbuf, int scount, struct ompi_datatype_t *
mca_coll_ucc_req_t *coll_req = NULL;

UCC_VERBOSE(3, "running ucc igatherv");
COLL_UCC_GET_REQ(coll_req);
COLL_UCC_GET_REQ(coll_req, comm);
COLL_UCC_CHECK(mca_coll_ucc_gatherv_init(sbuf, scount, sdtype, rbuf, rcounts,
disps, rdtype, root, ucc_module,
&req, coll_req));
Expand Down
3 changes: 2 additions & 1 deletion ompi/mca/coll/ucc/coll_ucc_reduce.c
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@@ -1,5 +1,6 @@
/**
* Copyright (c) 2021 Mellanox Technologies. All rights reserved.
* Copyright (c) 2025 Fujitsu Limited. All rights reserved.
* $COPYRIGHT$
*
* Additional copyrights may follow
Expand Down Expand Up @@ -92,7 +93,7 @@ int mca_coll_ucc_ireduce(const void *sbuf, void* rbuf, int count,
mca_coll_ucc_req_t *coll_req = NULL;

UCC_VERBOSE(3, "running ucc ireduce");
COLL_UCC_GET_REQ(coll_req);
COLL_UCC_GET_REQ(coll_req, comm);
COLL_UCC_CHECK(mca_coll_ucc_reduce_init(sbuf, rbuf, count, dtype, op, root,
ucc_module, &req, coll_req));
COLL_UCC_POST_AND_CHECK(req);
Expand Down
3 changes: 2 additions & 1 deletion ompi/mca/coll/ucc/coll_ucc_reduce_scatter.c
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@@ -1,6 +1,7 @@
/**
* Copyright (c) 2021 Mellanox Technologies. All rights reserved.
* Copyright (c) 2022 NVIDIA Corporation. All rights reserved.
* Copyright (c) 2025 Fujitsu Limited. All rights reserved.
* $COPYRIGHT$
*
* Additional copyrights may follow
Expand Down Expand Up @@ -103,7 +104,7 @@ int mca_coll_ucc_ireduce_scatter(const void *sbuf, void *rbuf, const int *rcount
mca_coll_ucc_req_t *coll_req = NULL;

UCC_VERBOSE(3, "running ucc ireduce_scatter");
COLL_UCC_GET_REQ(coll_req);
COLL_UCC_GET_REQ(coll_req, comm);
COLL_UCC_CHECK(mca_coll_ucc_reduce_scatter_init(sbuf, rbuf, rcounts, dtype,
op, ucc_module, &req, coll_req));
COLL_UCC_POST_AND_CHECK(req);
Expand Down
3 changes: 2 additions & 1 deletion ompi/mca/coll/ucc/coll_ucc_reduce_scatter_block.c
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@@ -1,6 +1,7 @@
/**
* Copyright (c) 2021 Mellanox Technologies. All rights reserved.
* Copyright (c) 2022 NVIDIA Corporation. All rights reserved.
* Copyright (c) 2025 Fujitsu Limited. All rights reserved.
* $COPYRIGHT$
*
* Additional copyrights may follow
Expand Down Expand Up @@ -98,7 +99,7 @@ int mca_coll_ucc_ireduce_scatter_block(const void *sbuf, void *rbuf, int rcount,
mca_coll_ucc_req_t *coll_req = NULL;

UCC_VERBOSE(3, "running ucc ireduce_scatter_block");
COLL_UCC_GET_REQ(coll_req);
COLL_UCC_GET_REQ(coll_req, comm);
COLL_UCC_CHECK(mca_coll_ucc_reduce_scatter_block_init(sbuf, rbuf, rcount,
dtype, op, ucc_module,
&req, coll_req));
Expand Down
3 changes: 2 additions & 1 deletion ompi/mca/coll/ucc/coll_ucc_scatter.c
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@@ -1,6 +1,7 @@
/**
* Copyright (c) 2021 Mellanox Technologies. All rights reserved.
* Copyright (c) 2022 NVIDIA Corporation. All rights reserved.
* Copyright (c) 2025 Fujitsu Limited. All rights reserved.
* $COPYRIGHT$
*
* Additional copyrights may follow
Expand Down Expand Up @@ -117,7 +118,7 @@ int mca_coll_ucc_iscatter(const void *sbuf, int scount,
mca_coll_ucc_req_t *coll_req = NULL;

UCC_VERBOSE(3, "running ucc iscatter");
COLL_UCC_GET_REQ(coll_req);
COLL_UCC_GET_REQ(coll_req, comm);
COLL_UCC_CHECK(mca_coll_ucc_scatter_init(sbuf, scount, sdtype, rbuf, rcount,
rdtype, root, ucc_module, &req,
coll_req));
Expand Down
3 changes: 2 additions & 1 deletion ompi/mca/coll/ucc/coll_ucc_scatterv.c
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@@ -1,6 +1,7 @@
/**
* Copyright (c) 2021 Mellanox Technologies. All rights reserved.
* Copyright (c) 2022 NVIDIA Corporation. All rights reserved.
* Copyright (c) 2025 Fujitsu Limited. All rights reserved.
* $COPYRIGHT$
*
* Additional copyrights may follow
Expand Down Expand Up @@ -110,7 +111,7 @@ int mca_coll_ucc_iscatterv(const void *sbuf, const int *scounts,
mca_coll_ucc_req_t *coll_req = NULL;

UCC_VERBOSE(3, "running ucc iscatterv");
COLL_UCC_GET_REQ(coll_req);
COLL_UCC_GET_REQ(coll_req, comm);
COLL_UCC_CHECK(mca_coll_ucc_scatterv_init(sbuf, scounts, disps, sdtype,
rbuf, rcount, rdtype, root,
ucc_module, &req, coll_req));
Expand Down