atomics: Remove cmpset_64 on IA32 #4189
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The recent changes to remove non-inline atomics have caused a cascade of issues with cmpset_64 on IA32. cmpxchg8 requires the use of a bunch of registers (2 for every operand, 3 operands), and one of them is ebx, which is used by the compiler to do shared library things. Some compilers don't deal well with ebx being clobbered (I'm looking at you, gcc 4.1). Rather than continue trying to fight, remove cmpset_64 from the supported atomic operations on IA32. Other 32 bit platforms (MIPS32, SPARC32, ARM, etc.) already don't support a 64 bit compare-and- swap, so while this might slightly reduce performance, it will at least be correct. Signed-off-by: Brian Barrett <[email protected]>
hjelmn
approved these changes
Sep 7, 2017
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The recent changes to remove non-inline atomics have caused
a cascade of issues with cmpset_64 on IA32. cmpxchg8 requires
the use of a bunch of registers (2 for every operand, 3 operands),
and one of them is ebx, which is used by the compiler to do
shared library things. Some compilers don't deal well with
ebx being clobbered (I'm looking at you, gcc 4.1). Rather than
continue trying to fight, remove cmpset_64 from the supported
atomic operations on IA32. Other 32 bit platforms (MIPS32,
SPARC32, ARM, etc.) already don't support a 64 bit compare-and-
swap, so while this might slightly reduce performance, it will
at least be correct.
Signed-off-by: Brian Barrett [email protected]