Skip to content

Commit 83311b2

Browse files
leecheechenwangleiat
leecheechen
authored and
wangleiat
committed
[LoongArch] Add LASX intrinsic testcases
Depends on D155830 Reviewed By: SixWeining Differential Revision: https://reviews.llvm.org/D155835
1 parent f3aa441 commit 83311b2

File tree

128 files changed

+9154
-0
lines changed

Some content is hidden

Large Commits have some content hidden by default. Use the searchbox below for content that may be hidden.

128 files changed

+9154
-0
lines changed

‎llvm/test/CodeGen/LoongArch/lasx/intrinsic-absd.ll‎

Lines changed: 98 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,98 @@
1+
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2+
; RUN: llc --mtriple=loongarch64 --mattr=+lasx < %s | FileCheck %s
3+
4+
declare <32 x i8> @llvm.loongarch.lasx.xvabsd.b(<32 x i8>, <32 x i8>)
5+
6+
define <32 x i8> @lasx_xvabsd_b(<32 x i8> %va, <32 x i8> %vb) nounwind {
7+
; CHECK-LABEL: lasx_xvabsd_b:
8+
; CHECK: # %bb.0: # %entry
9+
; CHECK-NEXT: xvabsd.b $xr0, $xr0, $xr1
10+
; CHECK-NEXT: ret
11+
entry:
12+
%res = call <32 x i8> @llvm.loongarch.lasx.xvabsd.b(<32 x i8> %va, <32 x i8> %vb)
13+
ret <32 x i8> %res
14+
}
15+
16+
declare <16 x i16> @llvm.loongarch.lasx.xvabsd.h(<16 x i16>, <16 x i16>)
17+
18+
define <16 x i16> @lasx_xvabsd_h(<16 x i16> %va, <16 x i16> %vb) nounwind {
19+
; CHECK-LABEL: lasx_xvabsd_h:
20+
; CHECK: # %bb.0: # %entry
21+
; CHECK-NEXT: xvabsd.h $xr0, $xr0, $xr1
22+
; CHECK-NEXT: ret
23+
entry:
24+
%res = call <16 x i16> @llvm.loongarch.lasx.xvabsd.h(<16 x i16> %va, <16 x i16> %vb)
25+
ret <16 x i16> %res
26+
}
27+
28+
declare <8 x i32> @llvm.loongarch.lasx.xvabsd.w(<8 x i32>, <8 x i32>)
29+
30+
define <8 x i32> @lasx_xvabsd_w(<8 x i32> %va, <8 x i32> %vb) nounwind {
31+
; CHECK-LABEL: lasx_xvabsd_w:
32+
; CHECK: # %bb.0: # %entry
33+
; CHECK-NEXT: xvabsd.w $xr0, $xr0, $xr1
34+
; CHECK-NEXT: ret
35+
entry:
36+
%res = call <8 x i32> @llvm.loongarch.lasx.xvabsd.w(<8 x i32> %va, <8 x i32> %vb)
37+
ret <8 x i32> %res
38+
}
39+
40+
declare <4 x i64> @llvm.loongarch.lasx.xvabsd.d(<4 x i64>, <4 x i64>)
41+
42+
define <4 x i64> @lasx_xvabsd_d(<4 x i64> %va, <4 x i64> %vb) nounwind {
43+
; CHECK-LABEL: lasx_xvabsd_d:
44+
; CHECK: # %bb.0: # %entry
45+
; CHECK-NEXT: xvabsd.d $xr0, $xr0, $xr1
46+
; CHECK-NEXT: ret
47+
entry:
48+
%res = call <4 x i64> @llvm.loongarch.lasx.xvabsd.d(<4 x i64> %va, <4 x i64> %vb)
49+
ret <4 x i64> %res
50+
}
51+
52+
declare <32 x i8> @llvm.loongarch.lasx.xvabsd.bu(<32 x i8>, <32 x i8>)
53+
54+
define <32 x i8> @lasx_xvabsd_bu(<32 x i8> %va, <32 x i8> %vb) nounwind {
55+
; CHECK-LABEL: lasx_xvabsd_bu:
56+
; CHECK: # %bb.0: # %entry
57+
; CHECK-NEXT: xvabsd.bu $xr0, $xr0, $xr1
58+
; CHECK-NEXT: ret
59+
entry:
60+
%res = call <32 x i8> @llvm.loongarch.lasx.xvabsd.bu(<32 x i8> %va, <32 x i8> %vb)
61+
ret <32 x i8> %res
62+
}
63+
64+
declare <16 x i16> @llvm.loongarch.lasx.xvabsd.hu(<16 x i16>, <16 x i16>)
65+
66+
define <16 x i16> @lasx_xvabsd_hu(<16 x i16> %va, <16 x i16> %vb) nounwind {
67+
; CHECK-LABEL: lasx_xvabsd_hu:
68+
; CHECK: # %bb.0: # %entry
69+
; CHECK-NEXT: xvabsd.hu $xr0, $xr0, $xr1
70+
; CHECK-NEXT: ret
71+
entry:
72+
%res = call <16 x i16> @llvm.loongarch.lasx.xvabsd.hu(<16 x i16> %va, <16 x i16> %vb)
73+
ret <16 x i16> %res
74+
}
75+
76+
declare <8 x i32> @llvm.loongarch.lasx.xvabsd.wu(<8 x i32>, <8 x i32>)
77+
78+
define <8 x i32> @lasx_xvabsd_wu(<8 x i32> %va, <8 x i32> %vb) nounwind {
79+
; CHECK-LABEL: lasx_xvabsd_wu:
80+
; CHECK: # %bb.0: # %entry
81+
; CHECK-NEXT: xvabsd.wu $xr0, $xr0, $xr1
82+
; CHECK-NEXT: ret
83+
entry:
84+
%res = call <8 x i32> @llvm.loongarch.lasx.xvabsd.wu(<8 x i32> %va, <8 x i32> %vb)
85+
ret <8 x i32> %res
86+
}
87+
88+
declare <4 x i64> @llvm.loongarch.lasx.xvabsd.du(<4 x i64>, <4 x i64>)
89+
90+
define <4 x i64> @lasx_xvabsd_du(<4 x i64> %va, <4 x i64> %vb) nounwind {
91+
; CHECK-LABEL: lasx_xvabsd_du:
92+
; CHECK: # %bb.0: # %entry
93+
; CHECK-NEXT: xvabsd.du $xr0, $xr0, $xr1
94+
; CHECK-NEXT: ret
95+
entry:
96+
%res = call <4 x i64> @llvm.loongarch.lasx.xvabsd.du(<4 x i64> %va, <4 x i64> %vb)
97+
ret <4 x i64> %res
98+
}

‎llvm/test/CodeGen/LoongArch/lasx/intrinsic-add.ll‎

Lines changed: 62 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,62 @@
1+
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2+
; RUN: llc --mtriple=loongarch64 --mattr=+lasx < %s | FileCheck %s
3+
4+
declare <32 x i8> @llvm.loongarch.lasx.xvadd.b(<32 x i8>, <32 x i8>)
5+
6+
define <32 x i8> @lasx_xvadd_b(<32 x i8> %va, <32 x i8> %vb) nounwind {
7+
; CHECK-LABEL: lasx_xvadd_b:
8+
; CHECK: # %bb.0: # %entry
9+
; CHECK-NEXT: xvadd.b $xr0, $xr0, $xr1
10+
; CHECK-NEXT: ret
11+
entry:
12+
%res = call <32 x i8> @llvm.loongarch.lasx.xvadd.b(<32 x i8> %va, <32 x i8> %vb)
13+
ret <32 x i8> %res
14+
}
15+
16+
declare <16 x i16> @llvm.loongarch.lasx.xvadd.h(<16 x i16>, <16 x i16>)
17+
18+
define <16 x i16> @lasx_xvadd_h(<16 x i16> %va, <16 x i16> %vb) nounwind {
19+
; CHECK-LABEL: lasx_xvadd_h:
20+
; CHECK: # %bb.0: # %entry
21+
; CHECK-NEXT: xvadd.h $xr0, $xr0, $xr1
22+
; CHECK-NEXT: ret
23+
entry:
24+
%res = call <16 x i16> @llvm.loongarch.lasx.xvadd.h(<16 x i16> %va, <16 x i16> %vb)
25+
ret <16 x i16> %res
26+
}
27+
28+
declare <8 x i32> @llvm.loongarch.lasx.xvadd.w(<8 x i32>, <8 x i32>)
29+
30+
define <8 x i32> @lasx_xvadd_w(<8 x i32> %va, <8 x i32> %vb) nounwind {
31+
; CHECK-LABEL: lasx_xvadd_w:
32+
; CHECK: # %bb.0: # %entry
33+
; CHECK-NEXT: xvadd.w $xr0, $xr0, $xr1
34+
; CHECK-NEXT: ret
35+
entry:
36+
%res = call <8 x i32> @llvm.loongarch.lasx.xvadd.w(<8 x i32> %va, <8 x i32> %vb)
37+
ret <8 x i32> %res
38+
}
39+
40+
declare <4 x i64> @llvm.loongarch.lasx.xvadd.d(<4 x i64>, <4 x i64>)
41+
42+
define <4 x i64> @lasx_xvadd_d(<4 x i64> %va, <4 x i64> %vb) nounwind {
43+
; CHECK-LABEL: lasx_xvadd_d:
44+
; CHECK: # %bb.0: # %entry
45+
; CHECK-NEXT: xvadd.d $xr0, $xr0, $xr1
46+
; CHECK-NEXT: ret
47+
entry:
48+
%res = call <4 x i64> @llvm.loongarch.lasx.xvadd.d(<4 x i64> %va, <4 x i64> %vb)
49+
ret <4 x i64> %res
50+
}
51+
52+
declare <4 x i64> @llvm.loongarch.lasx.xvadd.q(<4 x i64>, <4 x i64>)
53+
54+
define <4 x i64> @lasx_xvadd_q(<4 x i64> %va, <4 x i64> %vb) nounwind {
55+
; CHECK-LABEL: lasx_xvadd_q:
56+
; CHECK: # %bb.0: # %entry
57+
; CHECK-NEXT: xvadd.q $xr0, $xr0, $xr1
58+
; CHECK-NEXT: ret
59+
entry:
60+
%res = call <4 x i64> @llvm.loongarch.lasx.xvadd.q(<4 x i64> %va, <4 x i64> %vb)
61+
ret <4 x i64> %res
62+
}

‎llvm/test/CodeGen/LoongArch/lasx/intrinsic-adda.ll‎

Lines changed: 50 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,50 @@
1+
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2+
; RUN: llc --mtriple=loongarch64 --mattr=+lasx < %s | FileCheck %s
3+
4+
declare <32 x i8> @llvm.loongarch.lasx.xvadda.b(<32 x i8>, <32 x i8>)
5+
6+
define <32 x i8> @lasx_xvadda_b(<32 x i8> %va, <32 x i8> %vb) nounwind {
7+
; CHECK-LABEL: lasx_xvadda_b:
8+
; CHECK: # %bb.0: # %entry
9+
; CHECK-NEXT: xvadda.b $xr0, $xr0, $xr1
10+
; CHECK-NEXT: ret
11+
entry:
12+
%res = call <32 x i8> @llvm.loongarch.lasx.xvadda.b(<32 x i8> %va, <32 x i8> %vb)
13+
ret <32 x i8> %res
14+
}
15+
16+
declare <16 x i16> @llvm.loongarch.lasx.xvadda.h(<16 x i16>, <16 x i16>)
17+
18+
define <16 x i16> @lasx_xvadda_h(<16 x i16> %va, <16 x i16> %vb) nounwind {
19+
; CHECK-LABEL: lasx_xvadda_h:
20+
; CHECK: # %bb.0: # %entry
21+
; CHECK-NEXT: xvadda.h $xr0, $xr0, $xr1
22+
; CHECK-NEXT: ret
23+
entry:
24+
%res = call <16 x i16> @llvm.loongarch.lasx.xvadda.h(<16 x i16> %va, <16 x i16> %vb)
25+
ret <16 x i16> %res
26+
}
27+
28+
declare <8 x i32> @llvm.loongarch.lasx.xvadda.w(<8 x i32>, <8 x i32>)
29+
30+
define <8 x i32> @lasx_xvadda_w(<8 x i32> %va, <8 x i32> %vb) nounwind {
31+
; CHECK-LABEL: lasx_xvadda_w:
32+
; CHECK: # %bb.0: # %entry
33+
; CHECK-NEXT: xvadda.w $xr0, $xr0, $xr1
34+
; CHECK-NEXT: ret
35+
entry:
36+
%res = call <8 x i32> @llvm.loongarch.lasx.xvadda.w(<8 x i32> %va, <8 x i32> %vb)
37+
ret <8 x i32> %res
38+
}
39+
40+
declare <4 x i64> @llvm.loongarch.lasx.xvadda.d(<4 x i64>, <4 x i64>)
41+
42+
define <4 x i64> @lasx_xvadda_d(<4 x i64> %va, <4 x i64> %vb) nounwind {
43+
; CHECK-LABEL: lasx_xvadda_d:
44+
; CHECK: # %bb.0: # %entry
45+
; CHECK-NEXT: xvadda.d $xr0, $xr0, $xr1
46+
; CHECK-NEXT: ret
47+
entry:
48+
%res = call <4 x i64> @llvm.loongarch.lasx.xvadda.d(<4 x i64> %va, <4 x i64> %vb)
49+
ret <4 x i64> %res
50+
}

‎llvm/test/CodeGen/LoongArch/lasx/intrinsic-addi.ll‎

Lines changed: 50 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,50 @@
1+
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2+
; RUN: llc --mtriple=loongarch64 --mattr=+lasx < %s | FileCheck %s
3+
4+
declare <32 x i8> @llvm.loongarch.lasx.xvaddi.bu(<32 x i8>, i32)
5+
6+
define <32 x i8> @lasx_xvaddi_bu(<32 x i8> %va) nounwind {
7+
; CHECK-LABEL: lasx_xvaddi_bu:
8+
; CHECK: # %bb.0: # %entry
9+
; CHECK-NEXT: xvaddi.bu $xr0, $xr0, 1
10+
; CHECK-NEXT: ret
11+
entry:
12+
%res = call <32 x i8> @llvm.loongarch.lasx.xvaddi.bu(<32 x i8> %va, i32 1)
13+
ret <32 x i8> %res
14+
}
15+
16+
declare <16 x i16> @llvm.loongarch.lasx.xvaddi.hu(<16 x i16>, i32)
17+
18+
define <16 x i16> @lasx_xvaddi_hu(<16 x i16> %va) nounwind {
19+
; CHECK-LABEL: lasx_xvaddi_hu:
20+
; CHECK: # %bb.0: # %entry
21+
; CHECK-NEXT: xvaddi.hu $xr0, $xr0, 1
22+
; CHECK-NEXT: ret
23+
entry:
24+
%res = call <16 x i16> @llvm.loongarch.lasx.xvaddi.hu(<16 x i16> %va, i32 1)
25+
ret <16 x i16> %res
26+
}
27+
28+
declare <8 x i32> @llvm.loongarch.lasx.xvaddi.wu(<8 x i32>, i32)
29+
30+
define <8 x i32> @lasx_xvaddi_wu(<8 x i32> %va) nounwind {
31+
; CHECK-LABEL: lasx_xvaddi_wu:
32+
; CHECK: # %bb.0: # %entry
33+
; CHECK-NEXT: xvaddi.wu $xr0, $xr0, 1
34+
; CHECK-NEXT: ret
35+
entry:
36+
%res = call <8 x i32> @llvm.loongarch.lasx.xvaddi.wu(<8 x i32> %va, i32 1)
37+
ret <8 x i32> %res
38+
}
39+
40+
declare <4 x i64> @llvm.loongarch.lasx.xvaddi.du(<4 x i64>, i32)
41+
42+
define <4 x i64> @lasx_xvaddi_du(<4 x i64> %va) nounwind {
43+
; CHECK-LABEL: lasx_xvaddi_du:
44+
; CHECK: # %bb.0: # %entry
45+
; CHECK-NEXT: xvaddi.du $xr0, $xr0, 1
46+
; CHECK-NEXT: ret
47+
entry:
48+
%res = call <4 x i64> @llvm.loongarch.lasx.xvaddi.du(<4 x i64> %va, i32 1)
49+
ret <4 x i64> %res
50+
}

0 commit comments

Comments
 (0)