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8371651: [AArch64] Populate CPU _features flag on Windows #28461

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8371651: [AArch64] Populate CPU _features flag on Windows #28461

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32 changes: 20 additions & 12 deletions src/hotspot/os_cpu/windows_aarch64/vm_version_windows_aarch64.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -27,23 +27,31 @@
#include "runtime/vm_version.hpp"

int VM_Version::get_current_sve_vector_length() {
assert(_features & CPU_SVE, "should not call this");
ShouldNotReachHere();
return 0;
assert(VM_Version::supports_sve(), "should not call this");
// TODO: This is not available in the Windows SDK yet , so conservatively go with the lowest value (128 bits)
// https://developer.arm.com/documentation/101427/0102/Register-descriptions/Scalable-vector-extensions--SVE--registers/ZCR-EL1--SVE-Control-Register--EL1
return VM_Version::supports_sve() ? 128 / 8 : 0; // This value is in bytes
}

int VM_Version::set_and_get_current_sve_vector_length(int length) {
assert(_features & CPU_SVE, "should not call this");
ShouldNotReachHere();
return 0;
assert(VM_Version::supports_sve(), "should not call this");
// TODO: This is not available in the Windows SDK yet , so conservatively go with the lowest value (128 bits)
// https://developer.arm.com/documentation/101427/0102/Register-descriptions/Scalable-vector-extensions--SVE--registers/ZCR-EL1--SVE-Control-Register--EL1
return VM_Version::supports_sve() ? 128 / 8 : 0; // This value is in bytes
}

void VM_Version::get_os_cpu_info() {

if (IsProcessorFeaturePresent(PF_ARM_V8_CRC32_INSTRUCTIONS_AVAILABLE)) _features |= CPU_CRC32;
if (IsProcessorFeaturePresent(PF_ARM_V8_CRYPTO_INSTRUCTIONS_AVAILABLE)) _features |= CPU_AES | CPU_SHA1 | CPU_SHA2;
if (IsProcessorFeaturePresent(PF_ARM_VFP_32_REGISTERS_AVAILABLE)) _features |= CPU_ASIMD;
// No check for CPU_PMULL, CPU_SVE, CPU_SVE2
if (IsProcessorFeaturePresent(PF_ARM_V8_CRC32_INSTRUCTIONS_AVAILABLE)) _features |= BIT_MASK(CPU_CRC32);
if (IsProcessorFeaturePresent(PF_ARM_V8_CRYPTO_INSTRUCTIONS_AVAILABLE)) _features |= BIT_MASK(CPU_AES) | BIT_MASK(CPU_SHA1) | BIT_MASK(CPU_SHA2) | BIT_MASK(CPU_PMULL);
if (IsProcessorFeaturePresent(PF_ARM_VFP_32_REGISTERS_AVAILABLE)) _features |= BIT_MASK(CPU_ASIMD);
if (IsProcessorFeaturePresent(PF_ARM_V81_ATOMIC_INSTRUCTIONS_AVAILABLE)) _features |= BIT_MASK(CPU_LSE);
if (IsProcessorFeaturePresent(PF_ARM_SVE_INSTRUCTIONS_AVAILABLE)) _features |= BIT_MASK(CPU_SVE);
if (IsProcessorFeaturePresent(PF_ARM_SVE2_INSTRUCTIONS_AVAILABLE)) _features |= BIT_MASK(CPU_SVE2);
if (IsProcessorFeaturePresent(PF_ARM_SVE_BITPERM_INSTRUCTIONS_AVAILABLE)) _features |= BIT_MASK(CPU_SVEBITPERM);
if (IsProcessorFeaturePresent(PF_ARM_SHA3_INSTRUCTIONS_AVAILABLE)) _features |= BIT_MASK(CPU_SHA3);
if (IsProcessorFeaturePresent(PF_ARM_SHA512_INSTRUCTIONS_AVAILABLE)) _features |= BIT_MASK(CPU_SHA512);


__int64 dczid_el0 = _ReadStatusReg(0x5807 /* ARM64_DCZID_EL0 */);

Expand Down Expand Up @@ -94,8 +102,8 @@ void VM_Version::get_os_cpu_info() {
SYSTEM_INFO si;
GetSystemInfo(&si);
_model = si.wProcessorLevel;
_variant = si.wProcessorRevision / 0xFF;
_revision = si.wProcessorRevision & 0xFF;
_variant = (si.wProcessorRevision >> 8) & 0xFF; // Variant is the upper byte of wProcessorRevision
_revision = si.wProcessorRevision & 0xFF; // Revision is the lower byte of wProcessorRevision
}
}
}
Expand Down