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8 changes: 7 additions & 1 deletion src/hotspot/cpu/aarch64/c2_MacroAssembler_aarch64.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -108,14 +108,20 @@ address C2_MacroAssembler::arrays_hashcode(Register ary, Register cnt, Register
assert(is_power_of_2(unroll_factor), "can't use this value to calculate the jump target PC");
andr(tmp2, cnt, unroll_factor - 1);
adr(tmp1, BR_BASE);
sub(tmp1, tmp1, tmp2, ext::sxtw, 3);
// For Cortex-A53 offset is 4 because 2 nops are generated.
sub(tmp1, tmp1, tmp2, ext::sxtw, VM_Version::supports_a53mac() ? 4 : 3);
movw(tmp2, 0x1f);
br(tmp1);

bind(LOOP);
for (size_t i = 0; i < unroll_factor; ++i) {
load(tmp1, Address(post(ary, type2aelembytes(eltype))), eltype);
maddw(result, result, tmp2, tmp1);
// maddw generates an extra nop for Cortex-A53 (see maddw definition in macroAssembler).
// Generate 2nd nop to have 4 instructions per iteration.
if (VM_Version::supports_a53mac()) {
nop();
}
}
bind(BR_BASE);
subsw(cnt, cnt, unroll_factor);
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8 changes: 7 additions & 1 deletion src/hotspot/cpu/aarch64/stubGenerator_aarch64.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -5496,14 +5496,20 @@ class StubGenerator: public StubCodeGenerator {
__ andr(rscratch2, cnt, vf - 1);
__ bind(TAIL_SHORTCUT);
__ adr(rscratch1, BR_BASE);
__ sub(rscratch1, rscratch1, rscratch2, ext::uxtw, 3);
// For Cortex-A53 offset is 4 because 2 nops are generated.
__ sub(rscratch1, rscratch1, rscratch2, ext::uxtw, VM_Version::supports_a53mac() ? 4 : 3);
__ movw(rscratch2, 0x1f);
__ br(rscratch1);

for (size_t i = 0; i < vf - 1; ++i) {
__ load(rscratch1, Address(__ post(ary, type2aelembytes(eltype))),
eltype);
__ maddw(result, result, rscratch2, rscratch1);
// maddw generates an extra nop for Cortex-A53 (see maddw definition in macroAssembler).
// Generate 2nd nop to have 4 instructions per iteration.
if (VM_Version::supports_a53mac()) {
__ nop();
}
}
__ bind(BR_BASE);

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