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UCT/IB/MLX5: Warn about UCX_IB_MLX5_DEVX_OBJECTS being set empty for Grace CPUs in ucx.conf #10992

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UCT/IB/MLX5: Warn about UCX_IB_MLX5_DEVX_OBJECTS being set empty for Grace CPUs in ucx.conf #10992

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ea2a7b5
CONFIG: Don't set UCX_IB_MLX5_DEVX_OBJECTS empty for Grace CPUs
roiedanino Nov 5, 2025
64b3b2a
UCT/IB/MLX5/DV: added warning about devx being disabled in ucx.conf
roiedanino Nov 10, 2025
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9 changes: 9 additions & 0 deletions src/ucs/arch/cpu.h
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Original file line number Diff line number Diff line change
Expand Up @@ -169,6 +169,15 @@ static inline int ucs_cpu_prefer_relaxed_order()
(cpu_model == UCS_CPU_MODEL_AMD_TURIN)));
}

static inline int ucs_cpu_prefer_odp()
{
ucs_cpu_vendor_t cpu_vendor = ucs_arch_get_cpu_vendor();
ucs_cpu_model_t cpu_model = ucs_arch_get_cpu_model();

return ((cpu_vendor == UCS_CPU_VENDOR_NVIDIA) &&
(cpu_model == UCS_CPU_MODEL_NVIDIA_GRACE));
}


#define UCS_CPU_VENDOR_LABEL "CPU vendor"
#define UCS_CPU_MODEL_LABEL "CPU model"
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3 changes: 3 additions & 0 deletions src/uct/ib/mlx5/dv/ib_mlx5dv_md.c
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Expand Up @@ -1782,6 +1782,9 @@ static void uct_ib_mlx5_devx_check_odp(uct_ib_mlx5_md_t *md,
(UCS_BIT(UCT_IB_DEVX_OBJ_RCQP) | UCS_BIT(UCT_IB_DEVX_OBJ_DCI))) {
reason = "version 1 is not supported for DevX QP";
goto no_odp;
} else if (ucs_cpu_prefer_odp()) {
ucs_warn("%s: devx objects are disabled in ucx.conf, the performance may be degraded, as ODPv2 is not supported",
uct_ib_device_name(&md->super.dev));
}

odp_cap = UCT_IB_MLX5DV_ADDR_OF(
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