feat: implementation of transpiler for rv64

[876pol]

Resolves INT-6044.

This is mostly a mechanical copy of extensions/rv32im/ with RV32->RV64, limbs 4->8, opcode offsets 0x2xx->0x8xx.

New code in transpiler/src/lib.rs:

• Currently, the external rrs-lib crate used to decode RISC-V instructions only supports RV32, so extra logic is needed to handle RV64 specific commands:
  • OP-32 / OP-IMM-32 handling: ADDW, SUBW, SLLW, SRLW, SRAW, ADDIW and their immediate variants
  • 64-bit loads/stores: LD, SD, LWU (funct3 values that don't exist in RV32)
  • 6-bit shift immediates: manually extracts shamt from raw bits since rrs_lib only handles 5-bit
  • M-extension word ops: MULW, DIVW, DIVUW, REMW, REMUW

Other code changes:

• elf.rs: adds class: Class field so downstream can distinguish ELF32 vs ELF64
• util.rs: 8 new from_*_rv64 helpers — identical to RV32 versions but with RV64_REGISTER_NUM_LIMBS
• riscv.rs: adds RV64_REGISTER_NUM_LIMBS = 8

Changes in crates/toolchain/tests:

• Renamed existing RV32 test data with rv32im- prefix for clarity
• Added rv64_transpiler_tests.rs: verifies ELF64 decoding, transpilation with no UNIMP, custom opcode presence, and phantom discriminants
• Added two RV64 assembly fixtures (with pre-compiled ELFs):
  • rv64im-stress.S: exercises every RV64IM instruction group the transpiler handles
  • rv64im-intrin.S: exercises custom OpenVM opcodes (TERMINATE, PHANTOM, HINT_STORED, HINT_BUFFER)

[github-actions]

group	app.proof_time_ms	app.cycles	app.cells_used	leaf.proof_time_ms	leaf.cycles	leaf.cells_used
verify_fibair	235	322,610	0	-	-	-
fibonacci	1,078	1,500,265	0	-	-	-
regex	2,329	4,137,600	0	-	-	-
ecrecover	761	124,173	0	-	-	-
pairing	1,498	1,745,757	0	-	-	-

Commit: 1127bc5

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