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[CH32VM00X] Update SDK to apply correct clock #198

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[CH32VM00X] Update SDK to apply correct clock #198

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e70a6af
[CH32VM00X] Update USER directory with latest SDK
tako0910 May 26, 2025
ddbf910
[CH32VM00X] uncomment SYSCLK_FREQ define
tako0910 May 27, 2025
7601e26
[CH32VM00X] adjusted clock definitions to the SDK side
tako0910 May 27, 2025
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5 changes: 3 additions & 2 deletions boards.txt
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Original file line number Diff line number Diff line change
Expand Up @@ -159,10 +159,11 @@ CH32VM00X_EVT.menu.upload_method.ispMethod.upload.tool=wchisp


# Clock Select
# (Some of the ""MHz"" and ""MHZ"" notations are mixed, but this is to match the definitions on the SDK side.)
CH32VM00X_EVT.menu.clock.48MHz_HSI=48MHz Internal
CH32VM00X_EVT.menu.clock.48MHz_HSI.build.flags.clock=-DSYSCLK_FREQ_48MHz_HSI=48000000 -DF_CPU=48000000
CH32VM00X_EVT.menu.clock.48MHz_HSI.build.flags.clock=-DSYSCLK_FREQ_48MHZ_HSI=48000000 -DF_CPU=48000000
CH32VM00X_EVT.menu.clock.24MHz_HSI=24MHz Internal
CH32VM00X_EVT.menu.clock.24MHz_HSI.build.flags.clock=-DSYSCLK_FREQ_24MHz_HSI=24000000 -DF_CPU=24000000
CH32VM00X_EVT.menu.clock.24MHz_HSI.build.flags.clock=-DSYSCLK_FREQ_24MHZ_HSI=24000000 -DF_CPU=24000000
CH32VM00X_EVT.menu.clock.8MHz_HSI=8MHz Internal
CH32VM00X_EVT.menu.clock.8MHz_HSI.build.flags.clock=-DSYSCLK_FREQ_8MHz_HSI=8000000 -DF_CPU=8000000
CH32VM00X_EVT.menu.clock.48MHz_HSE=48MHz External
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3 changes: 2 additions & 1 deletion system/CH32VM00X/USER/ch32v00X_it.c
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Original file line number Diff line number Diff line change
Expand Up @@ -2,7 +2,7 @@
* File Name : ch32v00X_it.c
* Author : WCH
* Version : V1.0.0
* Date : 2024/01/01
* Date : 2024/11/04
* Description : Main Interrupt Service Routines.
*********************************************************************************
* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
Expand Down Expand Up @@ -37,6 +37,7 @@ void NMI_Handler(void)
*/
void HardFault_Handler(void)
{
NVIC_SystemReset();
while (1)
{
}
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55 changes: 35 additions & 20 deletions system/CH32VM00X/USER/system_ch32v00X.c
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Original file line number Diff line number Diff line change
Expand Up @@ -2,7 +2,7 @@
* File Name : system_ch32v00X.c
* Author : WCH
* Version : V1.0.0
* Date : 2024/01/01
* Date : 2024/11/04
* Description : CH32V00X Device Peripheral Access Layer System Source File.
*********************************************************************************
* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
Expand All @@ -18,19 +18,19 @@
*/

//#define SYSCLK_FREQ_8MHz_HSI 8000000
//#define SYSCLK_FREQ_24MHz_HSI HSI_VALUE
//#define SYSCLK_FREQ_48MHz_HSI 48000000
//#define SYSCLK_FREQ_24MHZ_HSI HSI_VALUE
//#define SYSCLK_FREQ_48MHZ_HSI 48000000
//#define SYSCLK_FREQ_8MHz_HSE 8000000
//#define SYSCLK_FREQ_24MHz_HSE HSE_VALUE
//#define SYSCLK_FREQ_48MHz_HSE 48000000

/* Clock Definitions */
#ifdef SYSCLK_FREQ_8MHz_HSI
uint32_t SystemCoreClock = SYSCLK_FREQ_8MHz_HSI; /* System Clock Frequency (Core Clock) */
#elif defined SYSCLK_FREQ_24MHz_HSI
uint32_t SystemCoreClock = SYSCLK_FREQ_24MHz_HSI; /* System Clock Frequency (Core Clock) */
#elif defined SYSCLK_FREQ_48MHz_HSI
uint32_t SystemCoreClock = SYSCLK_FREQ_48MHz_HSI; /* System Clock Frequency (Core Clock) */
#elif defined SYSCLK_FREQ_24MHZ_HSI
uint32_t SystemCoreClock = SYSCLK_FREQ_24MHZ_HSI; /* System Clock Frequency (Core Clock) */
#elif defined SYSCLK_FREQ_48MHZ_HSI
uint32_t SystemCoreClock = SYSCLK_FREQ_48MHZ_HSI; /* System Clock Frequency (Core Clock) */
#elif defined SYSCLK_FREQ_8MHz_HSE
uint32_t SystemCoreClock = SYSCLK_FREQ_8MHz_HSE; /* System Clock Frequency (Core Clock) */
#elif defined SYSCLK_FREQ_24MHz_HSE
Expand All @@ -49,10 +49,10 @@ static void SetSysClock(void);

#ifdef SYSCLK_FREQ_8MHz_HSI
static void SetSysClockTo_8MHz_HSI(void);
#elif defined SYSCLK_FREQ_24MHz_HSI
static void SetSysClockTo_24MHz_HSI(void);
#elif defined SYSCLK_FREQ_48MHz_HSI
static void SetSysClockTo_48MHz_HSI(void);
#elif defined SYSCLK_FREQ_24MHZ_HSI
static void SetSysClockTo_24MHZ_HSI(void);
#elif defined SYSCLK_FREQ_48MHZ_HSI
static void SetSysClockTo_48MHZ_HSI(void);
#elif defined SYSCLK_FREQ_8MHz_HSE
static void SetSysClockTo_8MHz_HSE(void);
#elif defined SYSCLK_FREQ_24MHz_HSE
Expand Down Expand Up @@ -80,8 +80,8 @@ void SystemInit (void)
RCC->CFGR0 &= (uint32_t)0x68FF0000;

tmp = RCC->CTLR;
tmp &= (uint32_t)0xFE16FFFB;
tmp |= (uint32_t)(1<<22)|(1<<20);
tmp &= (uint32_t)0xFED6FFFB;
tmp |= (uint32_t)(1<<20);
RCC->CTLR = tmp;

RCC->CTLR &= (uint32_t)0xFFFBFFFF;
Expand Down Expand Up @@ -194,7 +194,7 @@ static void SetSysClockTo_8MHz_HSI(void)
FLASH->ACTLR = (uint32_t)FLASH_ACTLR_LATENCY_0;
}

#elif defined SYSCLK_FREQ_24MHz_HSI
#elif defined SYSCLK_FREQ_24MHZ_HSI

/*********************************************************************
* @fn SetSysClockTo_24MHZ_HSI
Expand All @@ -203,7 +203,7 @@ static void SetSysClockTo_8MHz_HSI(void)
*
* @return none
*/
static void SetSysClockTo_24MHz_HSI(void)
static void SetSysClockTo_24MHZ_HSI(void)
{
/* HCLK = SYSCLK = PB1 */
RCC->CFGR0 |= (uint32_t)RCC_HPRE_DIV1;
Expand All @@ -213,7 +213,7 @@ static void SetSysClockTo_24MHz_HSI(void)
}


#elif defined SYSCLK_FREQ_48MHz_HSI
#elif defined SYSCLK_FREQ_48MHZ_HSI

/*********************************************************************
* @fn SetSysClockTo_48MHZ_HSI
Expand All @@ -222,7 +222,7 @@ static void SetSysClockTo_24MHz_HSI(void)
*
* @return none
*/
static void SetSysClockTo_48MHz_HSI(void)
static void SetSysClockTo_48MHZ_HSI(void)
{
/* HCLK = SYSCLK = PB1 */
RCC->CFGR0 |= (uint32_t)RCC_HPRE_DIV1;
Expand Down Expand Up @@ -302,8 +302,13 @@ static void SetSysClockTo_8MHz_HSE(void)
{
/*
* If HSE fails to start-up, the application will have wrong clock
* configuration. User can add here some code to deal with this error
* configuration. User can add here some code to deal with this error
*/
/* Open PA1-PA2 GPIO function */
AFIO->PCFR1 &= ~(1<<17);
RCC->PB2PCENR &= ~RCC_AFIOEN;

RCC->CTLR &= ((uint32_t)~RCC_HSEON);
}
}

Expand Down Expand Up @@ -361,8 +366,13 @@ static void SetSysClockTo_24MHz_HSE(void)
{
/*
* If HSE fails to start-up, the application will have wrong clock
* configuration. User can add here some code to deal with this error
* configuration. User can add here some code to deal with this error
*/
/* Open PA1-PA2 GPIO function */
AFIO->PCFR1 &= ~(1<<17);
RCC->PB2PCENR &= ~RCC_AFIOEN;

RCC->CTLR &= ((uint32_t)~RCC_HSEON);
}
}

Expand Down Expand Up @@ -430,8 +440,13 @@ static void SetSysClockTo_48MHz_HSE(void)
{
/*
* If HSE fails to start-up, the application will have wrong clock
* configuration. User can add here some code to deal with this error
* configuration. User can add here some code to deal with this error
*/
/* Open PA1-PA2 GPIO function */
AFIO->PCFR1 &= ~(1<<17);
RCC->PB2PCENR &= ~RCC_AFIOEN;

RCC->CTLR &= ((uint32_t)~RCC_HSEON);
}
}
#endif
Expand Down