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Wait a bit before issuing the first i2c transaction to tofino #2325

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Merged
labbott merged 1 commit into from
Dec 16, 2025
Merged

Wait a bit before issuing the first i2c transaction to tofino #2325

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10 changes: 10 additions & 0 deletions drv/sidecar-seq-server/src/tofino.rs
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Original file line number Diff line number Diff line change
Expand Up @@ -85,6 +85,10 @@ impl Tofino {
self.sequencer.set_enable(true)?;

// Wait for the VID to become valid, retrying as needed.
// Note that we don't check that the FPGA is in the correct state here
// before looping, which means that we might already be timed out before
// even starting this loop if the SP had been paused by the debugger at
// an in-opportune moment during bootup.
for i in 0..8 {
ringbuf_entry!(Trace::TofinoVidAttempt(i));
// Sleep first since there is a delay between the sequencer
Expand All @@ -106,6 +110,12 @@ impl Tofino {
self.sequencer.ack_vid()?;
ringbuf_entry!(Trace::TofinoVidAck);

// Let's give the Tofino some time to load before playing with
// the i2c interface. This is underspecified, but some systems
// need more than 0 time here for the i2c interface to
// ACK properly.
hl::sleep_for(50);

// Keep the PCIe PHY lanes in reset and delay PCIE_INIT so
// changes to the config can be made after loading parameters
// from EEPROM.
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