Skip to content

Commit 68f54f7

Browse files
mcaylandhuth
mcayland
authored and
huth
committed
next-cube: use named gpio to read RTC data bit in scr2
This is in preparation for moving NeXTRTC to its own separate device. Signed-off-by: Mark Cave-Ayland <[email protected]> Reviewed-by: Thomas Huth <[email protected]> Message-ID: <[email protected]> Signed-off-by: Thomas Huth <[email protected]>
1 parent ccbc8fa commit 68f54f7

File tree

1 file changed

+92
-77
lines changed

1 file changed

+92
-77
lines changed

‎hw/m68k/next-cube.c

Lines changed: 92 additions & 77 deletions
Original file line numberDiff line numberDiff line change
@@ -171,6 +171,90 @@ static bool next_rtc_cmd_is_write(uint8_t cmd)
171171
(cmd == 0xb1);
172172
}
173173

174+
static void next_rtc_data_in_irq(void *opaque, int n, int level)
175+
{
176+
NeXTPC *s = NEXT_PC(opaque);
177+
NeXTRTC *rtc = &s->rtc;
178+
179+
if (rtc->phase < 8) {
180+
rtc->command = (rtc->command << 1) | level;
181+
182+
if (rtc->phase == 7 && !next_rtc_cmd_is_write(rtc->command)) {
183+
if (rtc->command <= 0x1f) {
184+
/* RAM registers */
185+
rtc->retval = rtc->ram[rtc->command];
186+
}
187+
if ((rtc->command >= 0x20) && (rtc->command <= 0x2f)) {
188+
/* RTC */
189+
time_t time_h = time(NULL);
190+
struct tm *info = localtime(&time_h);
191+
rtc->retval = 0;
192+
193+
switch (rtc->command) {
194+
case 0x20:
195+
rtc->retval = SCR2_TOBCD(info->tm_sec);
196+
break;
197+
case 0x21:
198+
rtc->retval = SCR2_TOBCD(info->tm_min);
199+
break;
200+
case 0x22:
201+
rtc->retval = SCR2_TOBCD(info->tm_hour);
202+
break;
203+
case 0x24:
204+
rtc->retval = SCR2_TOBCD(info->tm_mday);
205+
break;
206+
case 0x25:
207+
rtc->retval = SCR2_TOBCD((info->tm_mon + 1));
208+
break;
209+
case 0x26:
210+
rtc->retval = SCR2_TOBCD((info->tm_year - 100));
211+
break;
212+
}
213+
}
214+
if (rtc->command == 0x30) {
215+
/* read the status 0x30 */
216+
rtc->retval = rtc->status;
217+
}
218+
if (rtc->command == 0x31) {
219+
/* read the control 0x31 */
220+
rtc->retval = rtc->control;
221+
}
222+
}
223+
}
224+
if (rtc->phase >= 8 && rtc->phase < 16) {
225+
if (next_rtc_cmd_is_write(rtc->command)) {
226+
/* Shift in value to write */
227+
rtc->value = (rtc->value << 1) | level;
228+
} else {
229+
/* Shift out value to read */
230+
qemu_irq rtc_data_in_irq = qdev_get_gpio_in_named(
231+
DEVICE(s), "pc-rtc-data-in", 0);
232+
233+
if (rtc->retval & (0x80 >> (rtc->phase - 8))) {
234+
qemu_irq_raise(rtc_data_in_irq);
235+
} else {
236+
qemu_irq_lower(rtc_data_in_irq);
237+
}
238+
}
239+
}
240+
241+
rtc->phase++;
242+
if (rtc->phase == 16 && next_rtc_cmd_is_write(rtc->command)) {
243+
if (rtc->command >= 0x80 && rtc->command <= 0x9f) {
244+
/* RAM registers */
245+
rtc->ram[rtc->command - 0x80] = rtc->value;
246+
}
247+
if (rtc->command == 0xb1) {
248+
/* write to 0x30 register */
249+
if (rtc->value & 0x04) {
250+
/* clear FTU */
251+
rtc->status = rtc->status & (~0x18);
252+
qemu_irq_lower(s->rtc_power_irq);
253+
}
254+
}
255+
}
256+
}
257+
174258
static void next_scr2_rtc_update(NeXTPC *s)
175259
{
176260
uint8_t old_scr2, scr2_2;
@@ -187,84 +271,13 @@ static void next_scr2_rtc_update(NeXTPC *s)
187271
/* If we are in going down clock... do something */
188272
if (((old_scr2 & SCR2_RTCLK) != (scr2_2 & SCR2_RTCLK)) &&
189273
((scr2_2 & SCR2_RTCLK) == 0)) {
190-
if (rtc->phase < 8) {
191-
rtc->command = (rtc->command << 1) |
192-
((scr2_2 & SCR2_RTDATA) ? 1 : 0);
193-
194-
if (rtc->phase == 7 && !next_rtc_cmd_is_write(rtc->command)) {
195-
if (rtc->command <= 0x1f) {
196-
/* RAM registers */
197-
rtc->retval = rtc->ram[rtc->command];
198-
}
199-
if ((rtc->command >= 0x20) && (rtc->command <= 0x2F)) {
200-
/* RTC */
201-
time_t time_h = time(NULL);
202-
struct tm *info = localtime(&time_h);
203-
rtc->retval = 0;
204-
205-
switch (rtc->command) {
206-
case 0x20:
207-
rtc->retval = SCR2_TOBCD(info->tm_sec);
208-
break;
209-
case 0x21:
210-
rtc->retval = SCR2_TOBCD(info->tm_min);
211-
break;
212-
case 0x22:
213-
rtc->retval = SCR2_TOBCD(info->tm_hour);
214-
break;
215-
case 0x24:
216-
rtc->retval = SCR2_TOBCD(info->tm_mday);
217-
break;
218-
case 0x25:
219-
rtc->retval = SCR2_TOBCD((info->tm_mon + 1));
220-
break;
221-
case 0x26:
222-
rtc->retval = SCR2_TOBCD((info->tm_year - 100));
223-
break;
224-
}
225-
}
226-
if (rtc->command == 0x30) {
227-
/* read the status 0x30 */
228-
rtc->retval = rtc->status;
229-
}
230-
if (rtc->command == 0x31) {
231-
/* read the control 0x31 */
232-
rtc->retval = rtc->control;
233-
}
234-
}
235-
}
236-
if (rtc->phase >= 8 && rtc->phase < 16) {
237-
if (next_rtc_cmd_is_write(rtc->command)) {
238-
/* Shift in value to write */
239-
rtc->value = (rtc->value << 1) |
240-
((scr2_2 & SCR2_RTDATA) ? 1 : 0);
241-
} else {
242-
/* Shift out value to read */
243-
qemu_irq rtc_data_in_irq = qdev_get_gpio_in_named(
244-
DEVICE(s), "pc-rtc-data-in", 0);
245-
246-
if (rtc->retval & (0x80 >> (rtc->phase - 8))) {
247-
qemu_irq_raise(rtc_data_in_irq);
248-
} else {
249-
qemu_irq_lower(rtc_data_in_irq);
250-
}
251-
}
252-
}
274+
qemu_irq rtc_data_in_irq = qdev_get_gpio_in_named(
275+
DEVICE(s), "rtc-data-in", 0);
253276

254-
rtc->phase++;
255-
if (rtc->phase == 16 && next_rtc_cmd_is_write(rtc->command)) {
256-
if (rtc->command >= 0x80 && rtc->command <= 0x9f) {
257-
/* RAM registers */
258-
rtc->ram[rtc->command - 0x80] = rtc->value;
259-
}
260-
if (rtc->command == 0xb1) {
261-
/* write to 0x30 register */
262-
if (rtc->value & 0x04) {
263-
/* clear FTU */
264-
rtc->status = rtc->status & (~0x18);
265-
qemu_irq_lower(s->rtc_power_irq);
266-
}
267-
}
277+
if (scr2_2 & SCR2_RTDATA) {
278+
qemu_irq_raise(rtc_data_in_irq);
279+
} else {
280+
qemu_irq_lower(rtc_data_in_irq);
268281
}
269282
}
270283
} else {
@@ -1104,6 +1117,8 @@ static void next_pc_init(Object *obj)
11041117
s->rtc_power_irq = qdev_get_gpio_in(DEVICE(obj), NEXT_PWR_I);
11051118
qdev_init_gpio_in_named(DEVICE(obj), next_pc_rtc_data_in_irq,
11061119
"pc-rtc-data-in", 1);
1120+
qdev_init_gpio_in_named(DEVICE(obj), next_rtc_data_in_irq,
1121+
"rtc-data-in", 1);
11071122
}
11081123

11091124
/*

0 commit comments

Comments
 (0)