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Jake-Carterpetejohanson-adi
Jake-Carter
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petejohanson-adi
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Update Flash Examples, Add API for Critical Sections (#357)
* Re-work and simplify Flash examples to resolve analogdevicesinc/msdk#287 * Add API for critical sections to mxc_sys.h MSDK-Commit: ae65f87128a50d3b8b10306fdecc215671e8aa84
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18 files changed

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-10
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18 files changed

+1281
-10
lines changed

‎MAX/Libraries/CMSIS/Device/Maxim/MAX32690/Include/max32690.h‎

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@@ -298,6 +298,7 @@ typedef enum {
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#define MXC_FLASH1_PAGE_SIZE 0x00002000UL
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#define MXC_FLASH0_MEM_SIZE 0x00300000UL
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#define MXC_FLASH1_MEM_SIZE 0x00040000UL
301+
#define MXC_FLASH_MEM_SIZE (MXC_FLASH0_MEM_SIZE + MXC_FLASH1_MEM_SIZE)
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#define MXC_INFO0_MEM_BASE 0x10800000UL
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#define MXC_INFO1_MEM_BASE 0x10802000UL
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#define MXC_INFO_MEM_BASE MXC_INFO0_MEM_BASE

‎MAX/Libraries/CMSIS/Device/Maxim/MAX78000/Include/max78000.h‎

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@@ -267,7 +267,11 @@ typedef enum {
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#else // __riscv
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#include <core_rv32.h>
270-
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#undef __CORTEX_M
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/* ^ TODO (Jake): Re-work our core_rv32.h file so this isn't
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necessary. Somehow __CORTEX_M is still getting defined
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even after removing it from the file.
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*/
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#endif // __riscv
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#include "system_max78000.h" /*!< System Header */

‎MAX/Libraries/CMSIS/Include/core_rv32.h‎

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@@ -65,15 +65,6 @@ extern "C" {
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@{
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*/
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68-
/* CMSIS CM4 definitions */
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#define __CM4_CMSIS_VERSION_MAIN (0x03) /*!< [31:16] CMSIS HAL main version */
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#define __CM4_CMSIS_VERSION_SUB (0x20) /*!< [15:0] CMSIS HAL sub version */
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#define __CM4_CMSIS_VERSION \
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((__CM4_CMSIS_VERSION_MAIN << 16) | \
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__CM4_CMSIS_VERSION_SUB) /*!< CMSIS HAL version number */
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#define __CORTEX_M (0x04) /*!< Cortex-M Core */
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#if defined(__CC_ARM)
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// #define __ASM __asm /*!< asm keyword for ARM Compiler */
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// #define __INLINE __inline /*!< inline keyword for ARM Compiler */

‎MAX/Libraries/PeriphDrivers/Include/MAX32520/mxc_sys.h‎

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@@ -118,6 +118,91 @@ typedef enum {
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/***** Function Prototypes *****/
120120

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typedef struct {
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int ie_status;
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int in_critical;
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} mxc_crit_state_t;
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static mxc_crit_state_t _state = { .ie_status = 0xFFFFFFFF, .in_critical = 0 };
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static inline void _mxc_crit_get_state()
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{
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#ifdef __CORTEX_M
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/*
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On ARM M the 0th bit of the Priority Mask register indicates
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whether interrupts are enabled or not.
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0 = enabled
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1 = disabled
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*/
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uint32_t primask = __get_PRIMASK();
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_state.ie_status = (primask == 0);
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#endif
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#ifdef __riscv
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/*
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On RISC-V bit position 3 (Machine Interrupt Enable) of the
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mstatus register indicates whether interrupts are enabled.
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0 = disabled
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1 = enabled
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*/
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uint32_t mstatus = get_mstatus();
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_state.ie_status = ((mstatus & (1 << 3)) != 0);
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#endif
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}
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/**
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* @brief Enter a critical section of code that cannot be interrupted.
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*/
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static inline void MXC_SYS_Crit_Enter(void)
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{
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_mxc_crit_get_state();
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if (_state.ie_status)
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__disable_irq();
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_state.in_critical = 1;
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}
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/**
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* @brief Exit a critical section of code, re-enabling interrupts if they
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* were previously.
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*/
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static inline void MXC_SYS_Crit_Exit(void)
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{
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if (_state.ie_status) {
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__enable_irq();
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}
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_state.in_critical = 0;
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_mxc_crit_get_state();
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/*
177+
^ Reset the state again to prevent edge case
178+
where interrupts get disabled, then Crit_Exit() gets
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called, which would inadvertently re-enable interrupts
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from old state.
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*/
182+
}
183+
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/**
185+
* @brief Polls whether code is currently executing from a critical section.
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* @returns 1 if code is currently in a critical section (interrupts are disabled).
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* 0 if code is not in a critical section.
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*/
189+
static inline int MXC_SYS_In_Crit_Section(void)
190+
{
191+
return _state.in_critical;
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}
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/**
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* @brief Macro for wrapping a section of code to make it critical. Note: this macro
196+
* does not support nesting.
197+
*/
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// clang-format off
199+
#define MXC_CRITICAL(code) { \
200+
MXC_SYS_Crit_Enter();\
201+
code;\
202+
MXC_SYS_Crit_Exit();\
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}
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// clang-format on
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121206
/**
122207
* @brief Determines if the selected peripheral clock is enabled.
123208
* @param clock Enumeration for desired clock.

‎MAX/Libraries/PeriphDrivers/Include/MAX32570/mxc_sys.h‎

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Original file line numberDiff line numberDiff line change
@@ -228,6 +228,91 @@ typedef enum {
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/***** Function Prototypes *****/
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typedef struct {
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int ie_status;
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int in_critical;
234+
} mxc_crit_state_t;
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236+
static mxc_crit_state_t _state = { .ie_status = 0xFFFFFFFF, .in_critical = 0 };
237+
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static inline void _mxc_crit_get_state()
239+
{
240+
#ifdef __CORTEX_M
241+
/*
242+
On ARM M the 0th bit of the Priority Mask register indicates
243+
whether interrupts are enabled or not.
244+
245+
0 = enabled
246+
1 = disabled
247+
*/
248+
uint32_t primask = __get_PRIMASK();
249+
_state.ie_status = (primask == 0);
250+
#endif
251+
#ifdef __riscv
252+
/*
253+
On RISC-V bit position 3 (Machine Interrupt Enable) of the
254+
mstatus register indicates whether interrupts are enabled.
255+
256+
0 = disabled
257+
1 = enabled
258+
*/
259+
uint32_t mstatus = get_mstatus();
260+
_state.ie_status = ((mstatus & (1 << 3)) != 0);
261+
#endif
262+
}
263+
264+
/**
265+
* @brief Enter a critical section of code that cannot be interrupted.
266+
*/
267+
static inline void MXC_SYS_Crit_Enter(void)
268+
{
269+
_mxc_crit_get_state();
270+
if (_state.ie_status)
271+
__disable_irq();
272+
_state.in_critical = 1;
273+
}
274+
275+
/**
276+
* @brief Exit a critical section of code, re-enabling interrupts if they
277+
* were previously.
278+
*/
279+
static inline void MXC_SYS_Crit_Exit(void)
280+
{
281+
if (_state.ie_status) {
282+
__enable_irq();
283+
}
284+
_state.in_critical = 0;
285+
_mxc_crit_get_state();
286+
/*
287+
^ Reset the state again to prevent edge case
288+
where interrupts get disabled, then Crit_Exit() gets
289+
called, which would inadvertently re-enable interrupts
290+
from old state.
291+
*/
292+
}
293+
294+
/**
295+
* @brief Polls whether code is currently executing from a critical section.
296+
* @returns 1 if code is currently in a critical section (interrupts are disabled).
297+
* 0 if code is not in a critical section.
298+
*/
299+
static inline int MXC_SYS_In_Crit_Section(void)
300+
{
301+
return _state.in_critical;
302+
}
303+
304+
/**
305+
* @brief Macro for wrapping a section of code to make it critical. Note: this macro
306+
* does not support nesting.
307+
*/
308+
// clang-format off
309+
#define MXC_CRITICAL(code) { \
310+
MXC_SYS_Crit_Enter();\
311+
code;\
312+
MXC_SYS_Crit_Exit();\
313+
}
314+
// clang-format on
315+
231316
/**
232317
* @brief Determines if the selected peripheral clock is enabled.
233318
* @param clock Enumeration for desired clock.

‎MAX/Libraries/PeriphDrivers/Include/MAX32572/mxc_sys.h‎

Lines changed: 85 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -182,6 +182,91 @@ typedef enum {
182182

183183
/***** Function Prototypes *****/
184184

185+
typedef struct {
186+
int ie_status;
187+
int in_critical;
188+
} mxc_crit_state_t;
189+
190+
static mxc_crit_state_t _state = { .ie_status = 0xFFFFFFFF, .in_critical = 0 };
191+
192+
static inline void _mxc_crit_get_state()
193+
{
194+
#ifdef __CORTEX_M
195+
/*
196+
On ARM M the 0th bit of the Priority Mask register indicates
197+
whether interrupts are enabled or not.
198+
199+
0 = enabled
200+
1 = disabled
201+
*/
202+
uint32_t primask = __get_PRIMASK();
203+
_state.ie_status = (primask == 0);
204+
#endif
205+
#ifdef __riscv
206+
/*
207+
On RISC-V bit position 3 (Machine Interrupt Enable) of the
208+
mstatus register indicates whether interrupts are enabled.
209+
210+
0 = disabled
211+
1 = enabled
212+
*/
213+
uint32_t mstatus = get_mstatus();
214+
_state.ie_status = ((mstatus & (1 << 3)) != 0);
215+
#endif
216+
}
217+
218+
/**
219+
* @brief Enter a critical section of code that cannot be interrupted.
220+
*/
221+
static inline void MXC_SYS_Crit_Enter(void)
222+
{
223+
_mxc_crit_get_state();
224+
if (_state.ie_status)
225+
__disable_irq();
226+
_state.in_critical = 1;
227+
}
228+
229+
/**
230+
* @brief Exit a critical section of code, re-enabling interrupts if they
231+
* were previously.
232+
*/
233+
static inline void MXC_SYS_Crit_Exit(void)
234+
{
235+
if (_state.ie_status) {
236+
__enable_irq();
237+
}
238+
_state.in_critical = 0;
239+
_mxc_crit_get_state();
240+
/*
241+
^ Reset the state again to prevent edge case
242+
where interrupts get disabled, then Crit_Exit() gets
243+
called, which would inadvertently re-enable interrupts
244+
from old state.
245+
*/
246+
}
247+
248+
/**
249+
* @brief Polls whether code is currently executing from a critical section.
250+
* @returns 1 if code is currently in a critical section (interrupts are disabled).
251+
* 0 if code is not in a critical section.
252+
*/
253+
static inline int MXC_SYS_In_Crit_Section(void)
254+
{
255+
return _state.in_critical;
256+
}
257+
258+
/**
259+
* @brief Macro for wrapping a section of code to make it critical. Note: this macro
260+
* does not support nesting.
261+
*/
262+
// clang-format off
263+
#define MXC_CRITICAL(code) { \
264+
MXC_SYS_Crit_Enter();\
265+
code;\
266+
MXC_SYS_Crit_Exit();\
267+
}
268+
// clang-format on
269+
185270
/**
186271
* @brief Determines if the selected peripheral clock is enabled.
187272
* @param clock Enumeration for desired clock.

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