Move penv setup out of main.py / invert mcu detection logic

builder/frameworks/_embed_files.py

@@ -21,6 +21,8 @@
 Import("env")
 
 board = env.BoardConfig()
+mcu = board.get("build.mcu", "esp32")
+is_xtensa = mcu in ("esp32", "esp32s2", "esp32s3")
 
 #
 # Embedded files helpers
@@ -101,23 +103,22 @@ def transform_to_asm(target, source, env):
     files = [join("$BUILD_DIR", s.name + ".S") for s in source]
     return files, source
 
-
-mcu = board.get("build.mcu", "esp32")
+
 env.Append(
     BUILDERS=dict(
         TxtToBin=Builder(
             action=env.VerboseAction(
                 " ".join(
                     [
                         "riscv32-esp-elf-objcopy"
-                        if mcu in ("esp32c2","esp32c3","esp32c5","esp32c6","esp32h2","esp32p4")
-                        else "xtensa-%s-elf-objcopy" % mcu,
+                        if not is_xtensa
+                        else f"xtensa-{mcu}-elf-objcopy",
                         "--input-target",
                         "binary",
                         "--output-target",
-                        "elf32-littleriscv" if mcu in ("esp32c2","esp32c3","esp32c5","esp32c6","esp32h2","esp32p4") else "elf32-xtensa-le",
+                        "elf32-littleriscv" if not is_xtensa else "elf32-xtensa-le",
                         "--binary-architecture",
-                        "riscv" if mcu in ("esp32c2","esp32c3","esp32c5","esp32c6","esp32h2","esp32p4") else "xtensa",
+                        "riscv" if not is_xtensa else "xtensa",
                         "--rename-section",
                         ".data=.rodata.embedded",
                         "$SOURCE",

builder/frameworks/ulp.py

@@ -31,28 +31,30 @@
     BUILD_DIR, "esp-idf", project_config["name"].replace("__idf_", ""), "ulp_main"
 )
 
+is_xtensa = idf_variant in ("esp32", "esp32s2", "esp32s3")
 
 def prepare_ulp_env_vars(env):
     ulp_env.PrependENVPath("IDF_PATH", FRAMEWORK_DIR)
 
     toolchain_path = platform.get_package_dir(
         "toolchain-xtensa-esp-elf"
-        if idf_variant not in ("esp32c5","esp32c6", "esp32p4")
+        if is_xtensa
         else "toolchain-riscv32-esp"
     )
 
     toolchain_path_ulp = platform.get_package_dir(
         "toolchain-esp32ulp"
         if sdk_config.get("ULP_COPROC_TYPE_FSM", False)
-        else ""
+        else None
     )
 
+    python_dir = os.path.dirname(ulp_env.subst("$PYTHONEXE")) or ""
     additional_packages = [
         toolchain_path,
         toolchain_path_ulp,
         platform.get_package_dir("tool-ninja"),
         os.path.join(platform.get_package_dir("tool-cmake"), "bin"),
-        os.path.dirname(where_is_program("python")),
+        python_dir,
     ]
 
     for package in additional_packages:
@@ -85,17 +87,17 @@ def _generate_ulp_configuration_action(env, target, source):
         riscv_ulp_enabled = sdk_config.get("ULP_COPROC_TYPE_RISCV", False)
         lp_core_ulp_enabled = sdk_config.get("ULP_COPROC_TYPE_LP_CORE", False)
 
-        if lp_core_ulp_enabled == False:
+        if not lp_core_ulp_enabled:
             ulp_toolchain = "toolchain-%sulp%s.cmake"% (
                 "" if riscv_ulp_enabled else idf_variant + "-",
                 "-riscv" if riscv_ulp_enabled else "",
             )
         else:
             ulp_toolchain = "toolchain-lp-core-riscv.cmake"
 
-        comp_includes = ";".join(get_component_includes(target_config))
-        plain_includes = ";".join(app_includes["plain_includes"])
-        comp_includes = comp_includes + plain_includes
+        comp_includes_list = get_component_includes(target_config)
+        plain_includes_list = app_includes["plain_includes"]
+        comp_includes = ";".join(comp_includes_list + plain_includes_list)
 
         cmd = (
             os.path.join(platform.get_package_dir("tool-cmake"), "bin", "cmake"),