[ctrl] Clear the accelerator when the last operation is done

Author: Andrea Belano

rtl/redmule_ctrl.sv

@@ -154,6 +154,6 @@ module redmule_ctrl
   /*                            Other combinational assigmnets                                   */
   /*---------------------------------------------------------------------------------------------*/
   assign evt_o   = flgs_streamer_i.z_stream_sink_flags.done;
-  assign clear_o = latch_clear;
+  assign clear_o = latch_clear || current == REDMULE_FINISHED;
 
 endmodule : redmule_ctrl

rtl/redmule_top.sv

@@ -176,7 +176,7 @@ redmule_streamer #(
   .test_mode_i     ( test_mode_i     ),
   // Controller generated signals
   .enable_i        ( 1'b1            ),
-  .clear_i         ( clear           ),
+  .clear_i         ( '0              ),
   // Source interfaces for the incoming streams
   .x_stream_o      ( x_stream_str    ),
   .w_stream_o      ( w_stream_str    ),
@@ -489,7 +489,7 @@ redmule_memory_scheduler #(
 ) i_memory_scheduler (
   .clk_i             ( clk_acc         ),
   .rst_ni            ( rst_ni          ),
-  .clear_i           ( clear           ),
+  .clear_i           ( '0              ),
   .z_priority_i      ( z_priority      ),
   .config_i          ( redmule_config  ),
   .config_valid_i    ( cfg_complete    ),
@@ -612,29 +612,29 @@ redmule_scheduler #(
   .Width       ( Width          ),
   .NumPipeRegs ( NumPipeRegs    )
 ) i_scheduler (
-  .clk_i               ( clk_acc                   ),
-  .rst_ni              ( rst_ni                    ),
-  .test_mode_i         ( test_mode_i               ),
-  .clear_i             ( clear                     ),
-  .x_valid_i           ( x_buffer_fifo.valid       ),
-  .w_valid_i           ( w_buffer_fifo.valid       ),
-  .y_valid_i           ( y_buffer_fifo.valid       ),
-  .z_ready_i           ( z_buffer_q.ready          ),
-  .engine_flush_i      ( engine_flush              ),
-  .config_i            ( redmule_config            ),
-  .config_valid_i      ( cfg_complete              ),
-  .flgs_streamer_i     ( flgs_streamer             ),
-  .flgs_x_buffer_i     ( x_buffer_flgs             ),
-  .flgs_w_buffer_i     ( w_buffer_flgs             ),
-  .flgs_z_buffer_i     ( z_buffer_flgs             ),
-  .flgs_engine_i       ( flgs_engine               ),
-  .cntrl_scheduler_i   ( cntrl_scheduler           ),
-  .reg_enable_o        ( reg_enable                ),
-  .cntrl_engine_o      ( cntrl_engine              ),
-  .cntrl_x_buffer_o    ( x_buffer_ctrl             ),
-  .cntrl_w_buffer_o    ( w_buffer_ctrl             ),
-  .cntrl_z_buffer_o    ( z_buffer_ctrl             ),
-  .flgs_scheduler_o    ( flgs_scheduler            )
+  .clk_i               ( clk_acc             ),
+  .rst_ni              ( rst_ni              ),
+  .test_mode_i         ( test_mode_i         ),
+  .clear_i             ( '0                  ),
+  .x_valid_i           ( x_buffer_fifo.valid ),
+  .w_valid_i           ( w_buffer_fifo.valid ),
+  .y_valid_i           ( y_buffer_fifo.valid ),
+  .z_ready_i           ( z_buffer_q.ready    ),
+  .engine_flush_i      ( engine_flush        ),
+  .config_i            ( redmule_config      ),
+  .config_valid_i      ( cfg_complete        ),
+  .flgs_streamer_i     ( flgs_streamer       ),
+  .flgs_x_buffer_i     ( x_buffer_flgs       ),
+  .flgs_w_buffer_i     ( w_buffer_flgs       ),
+  .flgs_z_buffer_i     ( z_buffer_flgs       ),
+  .flgs_engine_i       ( flgs_engine         ),
+  .cntrl_scheduler_i   ( cntrl_scheduler     ),
+  .reg_enable_o        ( reg_enable          ),
+  .cntrl_engine_o      ( cntrl_engine        ),
+  .cntrl_x_buffer_o    ( x_buffer_ctrl       ),
+  .cntrl_w_buffer_o    ( w_buffer_ctrl       ),
+  .cntrl_z_buffer_o    ( z_buffer_ctrl       ),
+  .flgs_scheduler_o    ( flgs_scheduler      )
 );
 
 endmodule : redmule_top