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Verilator compilation is failing, on what apparently seems to be a tool limitation. Waiting for feedback on verilator/verilator#5786. |
This is required cause an absolute path to `snitch_bootrom.sv` is used in the Make dependency list, while a relative path is used in a rule target. This would lead to a "No rule to make target" error when building the HW after a `make clean`.
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Verilator issue above has been fixed upstream. To merge this we must however either wait for a new release, or temporarily disable the Verilator jobs in the CI, or temporarily revert the clock period fix. |
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LGTM, I would just separate the the clock period change into its own PR and leave it open until there is a new Verilator release.
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This PR supersedes #203, integrating fixes to a couple other regressions resulting from #168.
Namely:
AliasRegionEnableis 0, as per Fix XBAR DMA address rules, add assertions #203Revert the testbench clock period back to 1ns from 10ns(moved to target: Fix testbench clock period regression from #168 #205)snitch_bootrom.svgeneration, presenting spurious changes without explicit modification