Add IHP130 Yosys-based synthesis flow and post-synthesis simulation

[igor-sachok]

Add IHP 130nm Yosys-based synthesis flow and post-synthesis simulation for the Snitch cluster.

The synthesis flow is added to the Gtihub CI, and both the synthesis flow and post-synthesis simulation with QuestaSim are added to the Gitlab CI.
This uses a smaller configuration (cfg/yosys-ci.json) to keep the CI within reasonable runtimes.

We were not able to test post-synthesis simulation with Verilator as it seems to take an excessive amount of time and memory in the build step.

The nonfree post-synthesis simulation flow was updated to better align both synthesis flows, PL_SIM variable replaced by a single shared TECH variable.

Other contributions:

• Add optional (c) mark in license header (used in yosys flow sources)
• Explicitly mount repo root in CI jobs at /repo path in container
• Split HW and SW docker build so they can execute in parallel (separate tag name calculation in docker-meta, and other common steps in a composite action)
• Remove VLT_JOBS=1 in CI which anyways had no effect (correct flag would be SN_VLT_JOBS)
• Update tutorial to coherently describe free and nonfree physical design flows
• Bump I$ and expose ICacheL1TagScm and ICacheL1DataScm to top-level as required to be set to non default value for Yosys synthesis flow
• Bump OSEDA required for newer Yosys version. The default assertion behaviour in Verilator was changed, so we need to explicitly pass --no-assert-case now, until we can bump to new release including this PR (Fix overlapping case item expressions (#6825) verilator/verilator#6886). --trace flag has also been deprecated (superseded by --trace-vcd). Also required patch to FESVR.
• Use single FESVR version for all simulator testbenches
• Take clang-format from Snitch LLVM toolchain, so we don't need to separately install it in the container
• Bump Python version (aligned with the one in Yosys)
• Alias make in iis-setup.sh to support grouped targets
• Prevent pytest from recursing into submodules
• Bump nonfree repo
• Add stronger command checks in makefiles, including (but not only) setting pipefail

TODOs

• Add RTL prerequisites to yosys target
• Replace compile_tech.tcl with Bender snippet
• Take Verilator and Yosys from OSEDA container (not sufficient, we must also install some shared libraries)
• Expose L1_TAG_SCM and L1_DATA_SCM parameters to config file, and use SCMs only for Yosys synthesis
• Add Yosys synthesis and PSS to CI
• Align closed-source and open-source PSS
• Parallelize software docker container build and other jobs

[colluca]

Thanks for the contribution @igor-sachok!