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drv/ioport/ioport_lpf2: consolidate platform data
Previously we had individual platform data structures for each port. This combines those into an array and adds an extra field for controlling the port VCC, which will be used later.
1 parent b094823 commit 01f1e17

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6 files changed

+216
-241
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6 files changed

+216
-241
lines changed

‎lib/pbio/drv/ioport/ioport_lpf2.c‎

Lines changed: 46 additions & 74 deletions
Original file line numberDiff line numberDiff line change
@@ -40,7 +40,7 @@ typedef struct _dcm_data_t {
4040

4141
typedef struct {
4242
pbio_iodev_t *iodev;
43-
const pbdrv_ioport_lpf2_platform_port_t *pins;
43+
const pbdrv_ioport_lpf2_port_platform_data_t *pdata;
4444
dcm_data_t dcm;
4545
struct pt pt;
4646
pbio_iodev_type_id_t connected_type_id;
@@ -209,60 +209,32 @@ static const pbio_iodev_type_id_t ioport_type_id_lookup[3][3] = {
209209

210210
PROCESS(pbdrv_ioport_lpf2_process, "I/O port");
211211

212-
static ioport_dev_t ioport_devs[PBDRV_CONFIG_IOPORT_LPF2_NUM_PORTS] = {
213-
#if PBDRV_CONFIG_IOPORT_LPF2_NUM_PORTS > 0
214-
[0] = {
215-
.pins = &pbdrv_ioport_lpf2_platform_port_0,
216-
},
217-
#endif
218-
#if PBDRV_CONFIG_IOPORT_LPF2_NUM_PORTS > 1
219-
[1] = {
220-
.pins = &pbdrv_ioport_lpf2_platform_port_1,
221-
},
222-
#endif
223-
#if PBDRV_CONFIG_IOPORT_LPF2_NUM_PORTS > 2
224-
[2] = {
225-
.pins = &pbdrv_ioport_lpf2_platform_port_2,
226-
},
227-
#endif
228-
#if PBDRV_CONFIG_IOPORT_LPF2_NUM_PORTS > 3
229-
[3] = {
230-
.pins = &pbdrv_ioport_lpf2_platform_port_3,
231-
},
232-
#endif
233-
#if PBDRV_CONFIG_IOPORT_LPF2_NUM_PORTS > 4
234-
[4] = {
235-
.pins = &pbdrv_ioport_lpf2_platform_port_4,
236-
},
237-
#endif
238-
#if PBDRV_CONFIG_IOPORT_LPF2_NUM_PORTS > 5
239-
[5] = {
240-
.pins = &pbdrv_ioport_lpf2_platform_port_5,
241-
},
242-
#endif
243-
};
212+
static ioport_dev_t ioport_devs[PBDRV_CONFIG_IOPORT_LPF2_NUM_PORTS];
244213

245214
static void ioport_enable_uart(ioport_dev_t *ioport) {
246-
const pbdrv_ioport_lpf2_platform_port_t *pins = ioport->pins;
215+
const pbdrv_ioport_lpf2_port_platform_data_t *pdata = ioport->pdata;
247216

248-
pbdrv_gpio_alt(&pins->uart_rx, pins->alt);
249-
pbdrv_gpio_alt(&pins->uart_tx, pins->alt);
250-
pbdrv_gpio_out_low(&pins->uart_buf);
217+
pbdrv_gpio_alt(&pdata->uart_rx, pdata->alt);
218+
pbdrv_gpio_alt(&pdata->uart_tx, pdata->alt);
219+
pbdrv_gpio_out_low(&pdata->uart_buf);
251220
}
252221

253222
static const pbio_iodev_ops_t basic_dev_ops = {
254223
};
255224

256225
static void init_one(uint8_t ioport) {
257-
const pbdrv_ioport_lpf2_platform_port_t *pins = ioport_devs[ioport].pins;
226+
const pbdrv_ioport_lpf2_port_platform_data_t *pdata =
227+
&pbdrv_ioport_lpf2_platform_data.ports[ioport];
228+
229+
ioport_devs[ioport].pdata = pdata;
258230

259231
PT_INIT(&ioport_devs[ioport].pt);
260232

261-
pbdrv_gpio_input(&pins->id1);
262-
pbdrv_gpio_input(&pins->id2);
263-
pbdrv_gpio_input(&pins->uart_buf);
264-
pbdrv_gpio_input(&pins->uart_tx);
265-
pbdrv_gpio_input(&pins->uart_rx);
233+
pbdrv_gpio_input(&pdata->id1);
234+
pbdrv_gpio_input(&pdata->id2);
235+
pbdrv_gpio_input(&pdata->uart_buf);
236+
pbdrv_gpio_input(&pdata->uart_tx);
237+
pbdrv_gpio_input(&pdata->uart_rx);
266238

267239
basic_devs[ioport].port = PBDRV_CONFIG_IOPORT_LPF2_FIRST_PORT + ioport;
268240
basic_devs[ioport].ops = &basic_dev_ops;
@@ -288,62 +260,62 @@ pbio_error_t pbdrv_ioport_get_iodev(pbio_port_t port, pbio_iodev_t **iodev) {
288260
static PT_THREAD(poll_dcm(ioport_dev_t * ioport)) {
289261
struct pt *pt = &ioport->pt;
290262
dcm_data_t *data = &ioport->dcm;
291-
const pbdrv_ioport_lpf2_platform_port_t pins = *ioport->pins;
263+
const pbdrv_ioport_lpf2_port_platform_data_t pdata = *ioport->pdata;
292264

293265
PT_BEGIN(pt);
294266

295267
data->type_id = PBIO_IODEV_TYPE_ID_NONE;
296268
data->dev_id1_group = DEV_ID1_GROUP_OPEN;
297269

298270
// set ID1 high
299-
pbdrv_gpio_out_high(&pins.uart_tx);
300-
pbdrv_gpio_out_low(&pins.uart_buf);
271+
pbdrv_gpio_out_high(&pdata.uart_tx);
272+
pbdrv_gpio_out_low(&pdata.uart_buf);
301273

302274
// set ID2 as input
303-
pbdrv_gpio_input(&pins.id2);
275+
pbdrv_gpio_input(&pdata.id2);
304276

305277
PT_YIELD(pt);
306278

307279
// save current ID2 value
308-
data->prev_gpio_value = pbdrv_gpio_input(&pins.id2);
280+
data->prev_gpio_value = pbdrv_gpio_input(&pdata.id2);
309281

310282
// set ID1 low
311-
pbdrv_gpio_out_low(&pins.uart_tx);
283+
pbdrv_gpio_out_low(&pdata.uart_tx);
312284

313285
PT_YIELD(pt);
314286

315287
// read ID2
316-
data->gpio_value = pbdrv_gpio_input(&pins.id2);
288+
data->gpio_value = pbdrv_gpio_input(&pdata.id2);
317289

318290
// if ID2 changed from high to low
319291
if (data->prev_gpio_value == 1 && data->gpio_value == 0) {
320292
// we have touch sensor
321293
data->type_id = PBIO_IODEV_TYPE_ID_LPF2_TOUCH;
322294

323295
// set ID1 as input
324-
pbdrv_gpio_out_high(&pins.uart_buf);
325-
pbdrv_gpio_input(&pins.uart_tx);
296+
pbdrv_gpio_out_high(&pdata.uart_buf);
297+
pbdrv_gpio_input(&pdata.uart_tx);
326298

327299
PT_YIELD(pt);
328300

329301
// ID1 is inverse of touch sensor value
330302
// TODO: save this value to sensor data
331-
// sensor_data = !pbdrv_gpio_input(&pins.id1);
303+
// sensor_data = !pbdrv_gpio_input(&pdata.id1);
332304
}
333305
// if ID2 changed from low to high
334306
else if (data->prev_gpio_value == 0 && data->gpio_value == 1) {
335307
data->type_id = PBIO_IODEV_TYPE_ID_LPF2_TPOINT;
336308
} else {
337309
// read ID1
338-
data->prev_gpio_value = pbdrv_gpio_input(&pins.id1);
310+
data->prev_gpio_value = pbdrv_gpio_input(&pdata.id1);
339311

340312
// set ID1 high
341-
pbdrv_gpio_out_high(&pins.uart_tx);
313+
pbdrv_gpio_out_high(&pdata.uart_tx);
342314

343315
PT_YIELD(pt);
344316

345317
// read ID1
346-
data->gpio_value = pbdrv_gpio_input(&pins.id1);
318+
data->gpio_value = pbdrv_gpio_input(&pdata.id1);
347319

348320
// if ID1 did not change and is high
349321
if (data->prev_gpio_value == 1 && data->gpio_value == 1) {
@@ -356,13 +328,13 @@ static PT_THREAD(poll_dcm(ioport_dev_t * ioport)) {
356328
data->dev_id1_group = DEV_ID1_GROUP_GND;
357329
} else {
358330
// set ID1 as input
359-
pbdrv_gpio_out_high(&pins.uart_buf);
360-
pbdrv_gpio_input(&pins.uart_tx);
331+
pbdrv_gpio_out_high(&pdata.uart_buf);
332+
pbdrv_gpio_input(&pdata.uart_tx);
361333

362334
PT_YIELD(pt);
363335

364336
// read ID1
365-
if (pbdrv_gpio_input(&pins.id1) == 1) {
337+
if (pbdrv_gpio_input(&pdata.id1) == 1) {
366338
// we have ID1 == open
367339
data->dev_id1_group = DEV_ID1_GROUP_OPEN;
368340
} else {
@@ -374,24 +346,24 @@ static PT_THREAD(poll_dcm(ioport_dev_t * ioport)) {
374346
PT_YIELD(pt);
375347

376348
// set ID1 as input
377-
pbdrv_gpio_out_high(&pins.uart_buf);
378-
pbdrv_gpio_input(&pins.uart_tx);
349+
pbdrv_gpio_out_high(&pdata.uart_buf);
350+
pbdrv_gpio_input(&pdata.uart_tx);
379351

380352
// set ID2 high
381-
pbdrv_gpio_out_high(&pins.id2);
353+
pbdrv_gpio_out_high(&pdata.id2);
382354

383355
PT_YIELD(pt);
384356

385357
// read ID1
386-
data->prev_gpio_value = pbdrv_gpio_input(&pins.id1);
358+
data->prev_gpio_value = pbdrv_gpio_input(&pdata.id1);
387359

388360
// set ID2 low
389-
pbdrv_gpio_out_low(&pins.id2);
361+
pbdrv_gpio_out_low(&pdata.id2);
390362

391363
PT_YIELD(pt);
392364

393365
// read ID1
394-
data->gpio_value = pbdrv_gpio_input(&pins.id1);
366+
data->gpio_value = pbdrv_gpio_input(&pdata.id1);
395367

396368
// if ID1 changed from high to low
397369
if (data->prev_gpio_value == 1 && data->gpio_value == 0) {
@@ -407,23 +379,23 @@ static PT_THREAD(poll_dcm(ioport_dev_t * ioport)) {
407379
data->type_id = PBIO_IODEV_TYPE_ID_LPF2_EXPLOD;
408380
} else {
409381
// set ID1 high
410-
pbdrv_gpio_out_high(&pins.uart_tx);
411-
pbdrv_gpio_out_low(&pins.uart_buf);
382+
pbdrv_gpio_out_high(&pdata.uart_tx);
383+
pbdrv_gpio_out_low(&pdata.uart_buf);
412384

413385
// set ID2 high
414-
pbdrv_gpio_out_high(&pins.id2);
386+
pbdrv_gpio_out_high(&pdata.id2);
415387

416388
PT_YIELD(pt);
417389

418390
// if ID2 is high
419-
if (pbdrv_gpio_input(&pins.uart_rx) == 1) {
391+
if (pbdrv_gpio_input(&pdata.uart_rx) == 1) {
420392
// set ID2 low
421-
pbdrv_gpio_out_low(&pins.id2);
393+
pbdrv_gpio_out_low(&pdata.id2);
422394

423395
PT_YIELD(pt);
424396

425397
// if ID2 is low
426-
if (pbdrv_gpio_input(&pins.uart_rx) == 0) {
398+
if (pbdrv_gpio_input(&pdata.uart_rx) == 0) {
427399
if (data->dev_id1_group < 3) {
428400
data->type_id = ioport_type_id_lookup[data->dev_id1_group][2];
429401
}
@@ -446,11 +418,11 @@ static PT_THREAD(poll_dcm(ioport_dev_t * ioport)) {
446418
PT_YIELD(pt);
447419

448420
// set ID2 as input
449-
pbdrv_gpio_input(&pins.id2);
421+
pbdrv_gpio_input(&pdata.id2);
450422

451423
// set ID1 high
452-
pbdrv_gpio_out_high(&pins.uart_tx);
453-
pbdrv_gpio_out_low(&pins.uart_buf);
424+
pbdrv_gpio_out_high(&pdata.uart_tx);
425+
pbdrv_gpio_out_low(&pdata.uart_buf);
454426

455427
if (data->type_id == data->prev_type_id) {
456428
if (++data->dev_id_match_count >= 20) {

‎lib/pbio/drv/ioport/ioport_lpf2.h‎

Lines changed: 16 additions & 26 deletions
Original file line numberDiff line numberDiff line change
@@ -11,13 +11,20 @@
1111

1212
// GPIOs associated with ID1 and ID2 pins
1313
typedef struct {
14-
const pbdrv_gpio_t id1; // pin 5 in
15-
const pbdrv_gpio_t id2; // pin 6 in/out
16-
const pbdrv_gpio_t uart_buf;
17-
const pbdrv_gpio_t uart_tx; // pin 5 out
18-
const pbdrv_gpio_t uart_rx; // pin 6 in
19-
const uint8_t alt;
20-
} pbdrv_ioport_lpf2_platform_port_t;
14+
pbdrv_gpio_t id1; // pin 5 in
15+
pbdrv_gpio_t id2; // pin 6 in/out
16+
pbdrv_gpio_t uart_buf;
17+
pbdrv_gpio_t uart_tx; // pin 5 out
18+
pbdrv_gpio_t uart_rx; // pin 6 in
19+
uint8_t alt;
20+
} pbdrv_ioport_lpf2_port_platform_data_t;
21+
22+
typedef struct {
23+
/** Supplies 3.3V power to pin 4 on all ports. */
24+
pbdrv_gpio_t port_vcc;
25+
/** Individual port data. */
26+
pbdrv_ioport_lpf2_port_platform_data_t ports[PBDRV_CONFIG_IOPORT_LPF2_NUM_PORTS];
27+
} pbdrv_ioport_lpf2_platform_data_t;
2128

2229
// platforom configuration checks
2330
#ifndef PBDRV_CONFIG_IOPORT_LPF2_NUM_PORTS
@@ -30,24 +37,7 @@ typedef struct {
3037
#error Platform must define PBDRV_CONFIG_IOPORT_LPF2_LAST_PORT
3138
#endif
3239

33-
// These are defined in platform/*/platform.c
34-
#if PBDRV_CONFIG_IOPORT_LPF2_NUM_PORTS > 0
35-
extern const pbdrv_ioport_lpf2_platform_port_t pbdrv_ioport_lpf2_platform_port_0;
36-
#endif
37-
#if PBDRV_CONFIG_IOPORT_LPF2_NUM_PORTS > 1
38-
extern const pbdrv_ioport_lpf2_platform_port_t pbdrv_ioport_lpf2_platform_port_1;
39-
#endif
40-
#if PBDRV_CONFIG_IOPORT_LPF2_NUM_PORTS > 2
41-
extern const pbdrv_ioport_lpf2_platform_port_t pbdrv_ioport_lpf2_platform_port_2;
42-
#endif
43-
#if PBDRV_CONFIG_IOPORT_LPF2_NUM_PORTS > 3
44-
extern const pbdrv_ioport_lpf2_platform_port_t pbdrv_ioport_lpf2_platform_port_3;
45-
#endif
46-
#if PBDRV_CONFIG_IOPORT_LPF2_NUM_PORTS > 4
47-
extern const pbdrv_ioport_lpf2_platform_port_t pbdrv_ioport_lpf2_platform_port_4;
48-
#endif
49-
#if PBDRV_CONFIG_IOPORT_LPF2_NUM_PORTS > 5
50-
extern const pbdrv_ioport_lpf2_platform_port_t pbdrv_ioport_lpf2_platform_port_5;
51-
#endif
40+
// This is defined in platform/*/platform.c
41+
extern const pbdrv_ioport_lpf2_platform_data_t pbdrv_ioport_lpf2_platform_data;
5242

5343
#endif // _INTERNAL_PBDRV_IOPORT_LPF2_H_

‎lib/pbio/platform/city_hub/platform.c‎

Lines changed: 28 additions & 20 deletions
Original file line numberDiff line numberDiff line change
@@ -35,6 +35,8 @@ enum {
3535
UART_ID_1,
3636
};
3737

38+
// button
39+
3840
const pbdrv_button_gpio_platform_t pbdrv_button_gpio_platform[PBDRV_CONFIG_BUTTON_GPIO_NUM_BUTTON] = {
3941
[0] = {
4042
.gpio = { .bank = GPIOC, .pin = 13 },
@@ -44,6 +46,32 @@ const pbdrv_button_gpio_platform_t pbdrv_button_gpio_platform[PBDRV_CONFIG_BUTTO
4446
}
4547
};
4648

49+
// I/O ports
50+
51+
const pbdrv_ioport_lpf2_platform_data_t pbdrv_ioport_lpf2_platform_data = {
52+
.port_vcc = { .bank = GPIOB, .pin = 2 },
53+
.ports = {
54+
// Port A
55+
{
56+
.id1 = { .bank = GPIOA, .pin = 1 },
57+
.id2 = { .bank = GPIOA, .pin = 3 },
58+
.uart_buf = { .bank = GPIOB, .pin = 5 },
59+
.uart_tx = { .bank = GPIOC, .pin = 4 },
60+
.uart_rx = { .bank = GPIOC, .pin = 5 },
61+
.alt = 1, // USART3
62+
},
63+
// Port B
64+
{
65+
.id1 = { .bank = GPIOA, .pin = 0 },
66+
.id2 = { .bank = GPIOA, .pin = 2 },
67+
.uart_buf = { .bank = GPIOB, .pin = 4 },
68+
.uart_tx = { .bank = GPIOC, .pin = 10 },
69+
.uart_rx = { .bank = GPIOC, .pin = 11 },
70+
.alt = 0, // USART4
71+
},
72+
},
73+
};
74+
4775
// LED
4876

4977
const pbdrv_led_pwm_platform_data_t pbdrv_led_pwm_platform_data[PBDRV_CONFIG_LED_PWM_NUM_DEV] = {
@@ -142,26 +170,6 @@ void pbdrv_reset_stm32_power_off(void) {
142170
IWDG->KR = 0xaaaa;
143171
}
144172

145-
// Port A - USART3
146-
const pbdrv_ioport_lpf2_platform_port_t pbdrv_ioport_lpf2_platform_port_0 = {
147-
.id1 = { .bank = GPIOA, .pin = 1 },
148-
.id2 = { .bank = GPIOA, .pin = 3 },
149-
.uart_buf = { .bank = GPIOB, .pin = 5 },
150-
.uart_tx = { .bank = GPIOC, .pin = 4 },
151-
.uart_rx = { .bank = GPIOC, .pin = 5 },
152-
.alt = 1,
153-
};
154-
155-
// Port B - USART4
156-
const pbdrv_ioport_lpf2_platform_port_t pbdrv_ioport_lpf2_platform_port_1 = {
157-
.id1 = { .bank = GPIOA, .pin = 0 },
158-
.id2 = { .bank = GPIOA, .pin = 2 },
159-
.uart_buf = { .bank = GPIOB, .pin = 4 },
160-
.uart_tx = { .bank = GPIOC, .pin = 10 },
161-
.uart_rx = { .bank = GPIOC, .pin = 11 },
162-
.alt = 0,
163-
};
164-
165173
// UART
166174

167175
const pbdrv_uart_stm32f0_platform_data_t pbdrv_uart_stm32f0_platform_data[PBDRV_CONFIG_UART_STM32F0_NUM_UART] = {

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