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21 changes: 16 additions & 5 deletions bricks/_common/arm_none_eabi.mk
Original file line number Diff line number Diff line change
Expand Up @@ -628,11 +628,20 @@ $(BUILD)/firmware-obj.bin: $(BUILD)/firmware.elf
$(ECHO) "`wc -c < $@` bytes"

ifeq ($(PB_MCU_FAMILY),TIAM1808)
UBOOT_FILE = $(PBTOP)/bricks/ev3/u-boot.bin

# REVISIT: downloading things doesn't belong in a Makefile.
$(BUILD)/u-boot.bin:
$(ECHO) "Downloading u-boot.bin"
$(Q)mkdir -p $(dir $@)
$(Q)curl -sL -o $@ https://github.com/pybricks/u-boot/releases/download/pybricks/v1.0.2/u-boot.bin
$(Q)echo "62fe9df8138a4676d61b72c6844f9e7c3cbfd85470b9cea1418abec4f79228ac $@" | sha256sum -c --strict

MAKE_BOOTABLE_IMAGE = $(PBTOP)/bricks/ev3/make_bootable_image.py

# For EV3, merge firmware blob with u-boot to create a bootable image.
$(BUILD)/firmware-base.bin: $(BUILD)/uImage
python $(MAKE_BOOTABLE_IMAGE) $(UBOOT_FILE) $(BUILD)/uImage $(BUILD)/firmware-base.bin
$(BUILD)/firmware-base.bin: $(MAKE_BOOTABLE_IMAGE) $(BUILD)/u-boot.bin $(BUILD)/uImage
$(Q)$^ $@

else
# For embeded systems, the firmware is just the base file.
$(BUILD)/firmware-base.bin: $(BUILD)/firmware-obj.bin
Expand All @@ -654,8 +663,10 @@ $(BUILD)/firmware.zip: $(ZIP_FILES)
$(Q)$(ZIP) -j $@ $^

# firmware in uImage format (for EV3)
$(BUILD)/uImage: $(BUILD)/firmware-obj.bin
mkimage -C none -A arm -T kernel -O linux -a 0xC0008000 -e 0xC0008000 -d $< $@
$(BUILD)/uImage: $(BUILD)/firmware-obj.bin $(BUILD)/firmware.elf
$(eval LOAD_ADDR := $(shell $(CROSS_COMPILE)readelf -l $(BUILD)/firmware.elf | grep "LOAD" | awk '{print $$4}'))
$(eval ENTRY_POINT := $(shell $(CROSS_COMPILE)readelf -h $(BUILD)/firmware.elf | grep "Entry point" | cut -d: -f2))
mkimage -C none -A arm -T standalone -O u-boot -a $(LOAD_ADDR) -e $(ENTRY_POINT) -d $< $@

# PRU firmware
$(BUILD)/pru_suart.bin.o: $(PBTOP)/lib/pbio/drv/uart/uart_ev3_pru_lib/pru_suart.bin
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16 changes: 12 additions & 4 deletions bricks/ev3/make_bootable_image.py
100644 → 100755
Original file line number Diff line number Diff line change
@@ -1,4 +1,8 @@
#!/usr/bin/env python3
# SPDX-License-Identifier: MIT

import argparse
import sys

# Expected layout of the firmware image:
#
Expand All @@ -18,14 +22,18 @@
FIRMWARE_ROUND_SIZE = 256 * 1024


def make_firmware(uboot_blob, uimage_blob):
def make_firmware(uboot_blob: bytes, uimage_blob: bytes) -> bytes:

if len(uboot_blob) > UBOOT_MAX_SIZE:
print("u-boot file is bigger than expected. Using only the first 256KiB.")
uboot_blob = uboot_blob[:UBOOT_MAX_SIZE]
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This was initially used to use the original LEGO firmware as a source to extract u-boot. But if we have a proper u-boot now, we should indeed no longer need it.

print(
f"u-boot file is bigger than 256KiB ({len(uboot_blob)} bytes), it is not safe to use.",
file=sys.stderr,
)
exit(1)

if len(uimage_blob) > UIMAGE_MAX_SIZE:
raise ValueError("uImage file is too big.")
print(f"uImage file is too big ({len(uimage_blob)} > {UIMAGE_MAX_SIZE}).", file=sys.stderr)
exit(1)

# Gets combined size, rounded to nearest expected size.
combined_size = UIMAGE_OFFSET + len(uimage_blob)
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Binary file removed bricks/ev3/u-boot.bin
Binary file not shown.
34 changes: 17 additions & 17 deletions lib/pbio/platform/ev3/start.S
Original file line number Diff line number Diff line change
Expand Up @@ -6,7 +6,7 @@
#include "soc_AM1808.h"

.global Entry
.global pbdrv_stack_end
.global pbdrv_stack_end
.global _bss_start
.global _bss_end

Expand All @@ -23,16 +23,16 @@

@
@ to set the mode bits in CPSR for different modes
@
.set MODE_USR, 0x10
@
.set MODE_USR, 0x10
.set MODE_FIQ, 0x11
.set MODE_IRQ, 0x12
.set MODE_SVC, 0x13
.set MODE_ABT, 0x17
.set MODE_UND, 0x1B
.set MODE_SYS, 0x1F
.set MODE_SYS, 0x1F

.equ I_F_BIT, 0xC0
.equ I_F_BIT, 0xC0

@**************************** Code Seection ***********************************
.text
Expand All @@ -48,7 +48,7 @@
@
@ The reset handler sets up the stack pointers for all the modes. The FIQ and
@ IRQ shall be disabled during this. Then, clearthe BSS sections, switch to the
@ main() function.
@ main() function.
@
Entry:
MRC p15, 0, r0, c1, c0, 0 @ Load Coprocessor Register C1 to ARM Register r0
Expand All @@ -57,37 +57,37 @@ Entry:
@
@ Set up the Stack for Undefined mode
@
LDR r0, =pbdrv_stack_end @ Read the stack address
LDR r0, =pbdrv_stack_end @ Read the stack address
MSR cpsr_c, #MODE_UND|I_F_BIT @ switch to undef mode
MOV sp,r0 @ write the stack pointer
SUB r0, r0, #UND_STACK_SIZE @ give stack space
@
@ Set up the Stack for abort mode
@
@
MSR cpsr_c, #MODE_ABT|I_F_BIT @ Change to abort mode
MOV sp, r0 @ write the stack pointer
SUB r0,r0, #ABT_STACK_SIZE @ give stack space
@
@ Set up the Stack for FIQ mode
@
@
MSR cpsr_c, #MODE_FIQ|I_F_BIT @ change to FIQ mode
MOV sp,r0 @ write the stack pointer
SUB r0,r0, #FIQ_STACK_SIZE @ give stack space
@
@ Set up the Stack for IRQ mode
@
@
MSR cpsr_c, #MODE_IRQ|I_F_BIT @ change to IRQ mode
MOV sp,r0 @ write the stack pointer
SUB r0,r0, #IRQ_STACK_SIZE @ give stack space
@
@ Set up the Stack for SVC mode
@
@
MSR cpsr_c, #MODE_SVC|I_F_BIT @ change to SVC mode
MOV sp,r0 @ write the stack pointer
SUB r0,r0, #SVC_STACK_SIZE @ give stack space
@
@ Set up the Stack for USer/System mode
@
@
MSR cpsr_c, #MODE_SYS|I_F_BIT @ change to system mode
MOV sp,r0 @ write the stack pointer

Expand All @@ -98,13 +98,13 @@ Clear_Bss_Section:

LDR r0, =_bss_start @ Start address of BSS
LDR r1, =(_bss_end - 0x04) @ End address of BSS
MOV r2, #0
Loop:
MOV r2, #0
Loop:
STR r2, [r0], #4 @ Clear one word in BSS
CMP r0, r1
BLE Loop @ Clear till BSS end


@
@ Enter the start_boot function. The execution still happens in system mode
@
Expand All @@ -120,7 +120,7 @@ Enter_main:
BLX r10 @ Branch to main

SUB pc, pc, #0x08 @ looping

@*****************************************************************************
@
@ End of the file
Expand Down