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10 | 10 |
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11 | 11 | #include "llvm-c/Disassembler.h"
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12 | 12 | #include "llvm/ADT/SmallString.h"
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| 13 | +#include "llvm/ADT/StringExtras.h" |
13 | 14 | #include "llvm/MC/MCAsmInfo.h"
|
14 | 15 | #include "llvm/MC/MCContext.h"
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15 | 16 | #include "llvm/MC/MCDisassembler/MCDisassembler.h"
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|
22 | 23 | #include "llvm/MC/MCSubtargetInfo.h"
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23 | 24 | #include "llvm/MC/MCTargetOptions.h"
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24 | 25 | #include "llvm/MC/TargetRegistry.h"
|
| 26 | +#include "llvm/Support/AArch64TargetParser.h" |
25 | 27 | #include "llvm/Support/ErrorHandling.h"
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26 | 28 | #include "llvm/Support/ScopedPrinter.h"
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27 | 29 | #include "llvm/Support/TargetSelect.h"
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@@ -1177,12 +1179,13 @@ DisassemblerLLVMC::DisassemblerLLVMC(const ArchSpec &arch,
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1177 | 1179 | features_str += "+dspr2,";
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1178 | 1180 | }
|
1179 | 1181 |
|
1180 |
| - // If any AArch64 variant, enable latest ISA with any optional |
1181 |
| - // extensions like MTE. |
| 1182 | + // If any AArch64 variant, enable latest ISA with all extensions. |
1182 | 1183 | if (triple.isAArch64()) {
|
1183 |
| - features_str += "+v9.3a,+mte,+sm4,+sha2,+sha3,+aes,+fp16fml,+sve2-aes,+" |
1184 |
| - "sve2-sm4,+sve2-sha3,+sve2-bitperm,+f32mm,+f64mm,+tme,+" |
1185 |
| - "ls64,+sme,+sme-f64,+sme-i64,+spe,+rand,+brbe"; |
| 1184 | + features_str += "+v9.3a,"; |
| 1185 | + std::vector<llvm::StringRef> features; |
| 1186 | + // Get all possible features |
| 1187 | + llvm::AArch64::getExtensionFeatures(-1, features); |
| 1188 | + features_str += llvm::join(features, ","); |
1186 | 1189 |
|
1187 | 1190 | if (triple.getVendor() == llvm::Triple::Apple)
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1188 | 1191 | cpu = "apple-latest";
|
|
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