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3 changes: 3 additions & 0 deletions backends/qualcomm/serialization/qc_schema.py
Original file line number Diff line number Diff line change
Expand Up @@ -27,6 +27,7 @@ class HtpArch(IntEnum):
V73 = 73
V75 = 75
V79 = 79
V81 = 81


@dataclass
Expand All @@ -49,6 +50,7 @@ class QcomChipset(IntEnum):
SXR1230P = 45 # v73
SXR2230P = 53 # v69
SXR2330P = 75 # v79
SAR2230P = 95 # v81


@dataclass
Expand All @@ -69,6 +71,7 @@ class SocInfo:
QcomChipset.SXR1230P: SocInfo(QcomChipset.SXR1230P, HtpInfo(HtpArch.V73, 2)),
QcomChipset.SXR2230P: SocInfo(QcomChipset.SXR2230P, HtpInfo(HtpArch.V69, 8)),
QcomChipset.SXR2330P: SocInfo(QcomChipset.SXR2330P, HtpInfo(HtpArch.V79, 8)),
QcomChipset.SAR2230P: SocInfo(QcomChipset.SAR2230P, HtpInfo(HtpArch.V81, 4)),
}


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2 changes: 2 additions & 0 deletions backends/qualcomm/utils/utils.py
Original file line number Diff line number Diff line change
Expand Up @@ -1099,6 +1099,7 @@ def get_soc_to_arch_map():
"SXR1230P": HtpArch.V73,
"SXR2230P": HtpArch.V69,
"SXR2330P": HtpArch.V79,
"SAR2230P": HtpArch.V81,
}


Expand All @@ -1115,6 +1116,7 @@ def get_soc_to_chipset_map():
"SXR1230P": QcomChipset.SXR1230P,
"SXR2230P": QcomChipset.SXR2230P,
"SXR2330P": QcomChipset.SXR2330P,
"SAR2230P": QcomChipset.SAR2230P,
}


Expand Down
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