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linux-yocto-dev: qcm6490: enable audio on rb3gen2
Enable audio on qcs6490-RB3Gen2 Signed-off-by: Jorge Ramirez-Ortiz <[email protected]>
1 parent b7b4f2f commit 55aa58d

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recipes-kernel/linux/linux-yocto-dev.bbappend

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@@ -16,6 +16,11 @@ SRC_URI:append:qcom = " \
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file://qcm6490-board-dts/0001-dt-bindings-clock-qcom-Add-compatible-for.patch \
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file://qcm6490-board-dts/0002-arm64-dts-qcom-qcm6490-idp-Update-the-LPASS.patch \
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file://qcm6490-board-dts/0003-arm64-dts-qcom-qcs6490-rb3gen2-Update-the-LPASS-audi.patch \
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file://qcm6490-board-dts/0001-arm64-dts-qcom-sc7280-Add-gpr-node.patch \
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file://qcm6490-board-dts/0002-arm64-dts-qcom-sc7280-Add-WSA-SoundWire-and-LPASS-su.patch \
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file://qcm6490-board-dts/0003-arm64-dts-qcom-qcs6490-rb3gen2-Modify-WSA-and-VA-mac.patch \
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file://qcm6490-board-dts/0004-arm64-dts-qcom-qcs6490-rb3gen2-add-WSA8830-speakers-.patch \
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file://qcm6490-board-dts/0005-arm64-dts-qcom-qcs6490-rb3gen2-Add-sound-card.patch \
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file://workarounds/0001-QCLINUX-arm64-dts-qcom-qcm6490-disable-sdhc1-for-ufs.patch \
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file://workarounds/0001-PENDING-arm64-dts-qcom-Remove-voltage-vote-support-f.patch \
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file://drivers/0003-PCI-Add-new-start_link-stop_link-function-ops.patch \
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From d917cb1baa4c2144317c3d38a3977c7e6dea9cf7 Mon Sep 17 00:00:00 2001
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From: Mohammad Rafi Shaik <[email protected]>
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Date: Mon, 17 Mar 2025 11:11:44 +0530
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Subject: [PATCH 1/5] arm64: dts: qcom: sc7280: Add gpr node
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Add GPR node along with APM(Audio Process Manager) and PRM(Proxy
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resource Manager) audio services.
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Signed-off-by: Mohammad Rafi Shaik <[email protected]>
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Co-developed-by: Prasad Kumpatla <[email protected]>
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Signed-off-by: Prasad Kumpatla <[email protected]>
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Upstream-Status: Submitted [https://lore.kernel.org/linux-arm-msm/[email protected]/]
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---
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arch/arm64/boot/dts/qcom/sc7280.dtsi | 37 ++++++++++++++++++++++++++++
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1 file changed, 37 insertions(+)
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diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi
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index 7c4f48783656..4ec39782f772 100644
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--- a/arch/arm64/boot/dts/qcom/sc7280.dtsi
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+++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi
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@@ -25,6 +25,8 @@
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#include <dt-bindings/reset/qcom,sdm845-aoss.h>
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#include <dt-bindings/reset/qcom,sdm845-pdc.h>
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#include <dt-bindings/soc/qcom,apr.h>
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+#include <dt-bindings/soc/qcom,gpr.h>
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+#include <dt-bindings/sound/qcom,q6dsp-lpass-ports.h>
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#include <dt-bindings/soc/qcom,rpmh-rsc.h>
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#include <dt-bindings/sound/qcom,lpass.h>
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#include <dt-bindings/thermal/thermal.h>
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@@ -3865,6 +3867,41 @@ q6routing: routing {
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};
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};
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+ gpr {
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+ compatible = "qcom,gpr";
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+ qcom,glink-channels = "adsp_apps";
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+ qcom,domain = <GPR_DOMAIN_ID_ADSP>;
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+ qcom,intents = <512 20>;
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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+
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+ q6apm: service@1 {
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+ compatible = "qcom,q6apm";
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+ reg = <GPR_APM_MODULE_IID>;
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+ #sound-dai-cells = <0>;
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+
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+ q6apmdai: dais {
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+ compatible = "qcom,q6apm-dais";
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+ iommus = <&apps_smmu 0x1801 0x0>;
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+ };
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+
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+ q6apmbedai: bedais {
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+ compatible = "qcom,q6apm-lpass-dais";
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+ #sound-dai-cells = <1>;
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+ };
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+ };
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+
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+ q6prm: service@2 {
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+ compatible = "qcom,q6prm";
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+ reg = <GPR_PRM_MODULE_IID>;
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+
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+ q6prmcc: clock-controller {
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+ compatible = "qcom,q6prm-lpass-clocks";
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+ #clock-cells = <2>;
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+ };
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+ };
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+ };
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+
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fastrpc {
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compatible = "qcom,fastrpc";
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qcom,glink-channels = "fastrpcglink-apps-dsp";
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--
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2.34.1
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From edafdd4685bf195d72396dfac5c1578204314e55 Mon Sep 17 00:00:00 2001
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From: Mohammad Rafi Shaik <[email protected]>
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Date: Mon, 17 Mar 2025 11:11:45 +0530
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Subject: [PATCH 2/5] arm64: dts: qcom: sc7280: Add WSA SoundWire and LPASS
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support
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Add WSA macroLPASS Codecs along with SoundWire controller.
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Signed-off-by: Mohammad Rafi Shaik <[email protected]>
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Co-developed-by: Prasad Kumpatla <[email protected]>
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Signed-off-by: Prasad Kumpatla <[email protected]>
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Upstream-Status: Submitted [https://lore.kernel.org/linux-arm-msm/[email protected]/]
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---
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arch/arm64/boot/dts/qcom/sc7280.dtsi | 68 ++++++++++++++++++++++++++++
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1 file changed, 68 insertions(+)
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diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi
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index 4ec39782f772..e8937c49a1e2 100644
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--- a/arch/arm64/boot/dts/qcom/sc7280.dtsi
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+++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi
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@@ -2610,6 +2610,64 @@ swr1: soundwire@3230000 {
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status = "disabled";
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};
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+ lpass_wsa_macro: codec@3240000 {
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+ compatible = "qcom,sc7280-lpass-wsa-macro";
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+ reg = <0x0 0x03240000 0x0 0x1000>;
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+
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&lpass_wsa_swr_clk>, <&lpass_wsa_swr_data>;
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+
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+ clocks = <&lpass_aon LPASS_AON_CC_TX_MCLK_CLK>,
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+ <&lpass_aon LPASS_AON_CC_TX_MCLK_2X_CLK>,
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+ <&lpass_va_macro>;
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+ clock-names = "mclk", "npl", "fsgen";
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+
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+ power-domains = <&lpass_hm LPASS_CORE_CC_LPASS_CORE_HM_GDSC>,
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+ <&lpass_aon LPASS_AON_CC_LPASS_AUDIO_HM_GDSC>;
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+ power-domain-names = "macro", "dcodec";
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+
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+ #clock-cells = <0>;
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+ clock-output-names = "mclk";
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+ #sound-dai-cells = <1>;
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+
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+ status = "disabled";
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+ };
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+
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+ swr2: soundwire@3250000 {
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+ compatible = "qcom,soundwire-v1.6.0";
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+ reg = <0x0 0x03250000 0x0 0x2000>;
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+
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+ interrupts = <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>;
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+ clocks = <&lpass_wsa_macro>;
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+ clock-names = "iface";
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+
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+ qcom,din-ports = <2>;
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+ qcom,dout-ports = <6>;
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+
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+ resets = <&lpass_audiocc LPASS_AUDIO_SWR_WSA_CGCR>;
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+ reset-names = "swr_audio_cgcr";
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+
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+ qcom,ports-sinterval-low = /bits/ 8 <0x07 0x1f 0x3f 0x07
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+ 0x1f 0x3f 0x0f 0x0f>;
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+ qcom,ports-offset1 = /bits/ 8 <0x01 0x02 0x0c 0x06 0x12 0x0d 0x07 0x0a>;
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+ qcom,ports-offset2 = /bits/ 8 <0xff 0x00 0x1f 0xff 0x00 0x1f 0x00 0x00>;
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+ qcom,ports-hstart = /bits/ 8 <0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff>;
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+ qcom,ports-hstop = /bits/ 8 <0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff>;
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+ qcom,ports-word-length = /bits/ 8 <0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff>;
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+ qcom,ports-block-pack-mode = /bits/ 8 <0xff 0xff 0x01 0xff 0xff 0x01
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+ 0xff 0xff>;
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+ qcom,ports-block-group-count = /bits/ 8 <0xff 0xff 0xff 0xff 0xff 0xff
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+ 0xff 0xff>;
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+ qcom,ports-lane-control = /bits/ 8 <0xff 0xff 0xff 0xff 0xff 0xff
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+ 0xff 0xff>;
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+
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+ #address-cells = <2>;
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+ #size-cells = <0>;
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+ #sound-dai-cells = <1>;
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+
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+ status = "disabled";
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+ };
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+
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lpass_audiocc: clock-controller@3300000 {
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compatible = "qcom,sc7280-lpassaudiocc";
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reg = <0 0x03300000 0 0x30000>,
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@@ -2816,6 +2874,16 @@ lpass_tx_swr_data: tx-swr-data-state {
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pins = "gpio1", "gpio2", "gpio14";
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function = "swr_tx_data";
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};
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+
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+ lpass_wsa_swr_clk: wsa-swr-clk-state {
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+ pins = "gpio10";
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+ function = "wsa_swr_clk";
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+ };
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+
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+ lpass_wsa_swr_data: wsa-swr-data-state {
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+ pins = "gpio11";
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+ function = "wsa_swr_data";
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+ };
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};
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gpu: gpu@3d00000 {
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--
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2.34.1
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From 0c90f9d90ff75ac50db39ec199b25725d97c0620 Mon Sep 17 00:00:00 2001
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From: Mohammad Rafi Shaik <[email protected]>
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Date: Mon, 17 Mar 2025 11:11:46 +0530
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Subject: [PATCH 3/5] arm64: dts: qcom: qcs6490-rb3gen2: Modify WSA and VA
5+
macro clock nodes for audioreach solution
6+
7+
Modify and enable WSA, VA and lpass_tlmm clock properties.
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For audioreach solution mclk, npl and fsgen clocks
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are enabled through the q6prm clock driver.
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Signed-off-by: Mohammad Rafi Shaik <[email protected]>
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Co-developed-by: Prasad Kumpatla <[email protected]>
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Signed-off-by: Prasad Kumpatla <[email protected]>
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Upstream-Status: Submitted [https://lore.kernel.org/linux-arm-msm/[email protected]/]
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---
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arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts | 31 ++++++++++++++++++++
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1 file changed, 31 insertions(+)
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diff --git a/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts b/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts
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index e962b3ae3400..5de90307e440 100644
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--- a/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts
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+++ b/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts
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@@ -12,6 +12,7 @@
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#include <dt-bindings/leds/common.h>
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#include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
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#include <dt-bindings/regulator/qcom,rpmh-regulator.h>
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+#include <dt-bindings/sound/qcom,q6afe.h>
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#include "sc7280.dtsi"
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#include "pm7250b.dtsi"
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#include "pm7325.dtsi"
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@@ -716,6 +717,36 @@ redriver_usb_con_sbu: endpoint {
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};
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};
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+&lpass_tlmm {
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+ clocks = <&q6prmcc LPASS_HW_MACRO_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>,
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+ <&q6prmcc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>;
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+ clock-names = "core", "audio";
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+};
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+
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+&lpass_va_macro {
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+ /delete-property/ power-domains;
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+ /delete-property/ power-domain-names;
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+ clocks = <&q6prmcc LPASS_CLK_ID_VA_CORE_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>,
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+ <&q6prmcc LPASS_HW_MACRO_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>,
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+ <&q6prmcc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>;
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+ clock-names = "mclk", "macro", "dcodec";
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+
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+ status = "okay";
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+};
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+
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+&lpass_wsa_macro {
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+ /delete-property/ power-domains;
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+ /delete-property/ power-domain-names;
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+ clocks = <&q6prmcc LPASS_CLK_ID_TX_CORE_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>,
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+ <&q6prmcc LPASS_CLK_ID_TX_CORE_NPL_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>,
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+ <&q6prmcc LPASS_HW_MACRO_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>,
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+ <&q6prmcc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>,
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+ <&lpass_va_macro>;
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+ clock-names = "mclk", "npl", "macro", "dcodec", "fsgen";
61+
+
62+
+ status = "okay";
63+
+};
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+
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&mdss {
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status = "okay";
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};
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--
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2.34.1
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From 41a4a1b2fb8086905655654b910a10c16ace3c63 Mon Sep 17 00:00:00 2001
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From: Jorge Ramirez-Ortiz <[email protected]>
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Date: Tue, 25 Mar 2025 17:19:40 +0100
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Subject: [PATCH 4/5] arm64: dts: qcom: qcs6490-rb3gen2: add WSA8830 speakers
5+
amplifier
6+
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Add nodes for WSA8830 speakers amplifier on qcs6490-rb3gen2 board.
8+
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Signed-off-by: Mohammad Rafi Shaik <[email protected]>
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Co-developed-by: Prasad Kumpatla <[email protected]>
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Signed-off-by: Prasad Kumpatla <[email protected]>
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Upstream-Status: Submitted [https://lore.kernel.org/linux-arm-msm/[email protected]/]
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---
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arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts | 27 ++++++++++++++++++++
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1 file changed, 27 insertions(+)
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diff --git a/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts b/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts
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index 5de90307e440..d35878783d5d 100644
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--- a/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts
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+++ b/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts
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@@ -1035,6 +1035,33 @@ tc956x_rst_state: tc956x-rst-state {
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};
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};
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+&swr2 {
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+ qcom,din-ports = <0>;
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+ qcom,dout-ports = <8>;
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+
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+ left_spkr: speaker@0,1 {
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+ compatible = "sdw10217020200";
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+ reg = <0 1>;
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+ powerdown-gpios = <&tlmm 158 GPIO_ACTIVE_LOW>;
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+ #sound-dai-cells = <0>;
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+ sound-name-prefix = "SpkrLeft";
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+ #thermal-sensor-cells = <0>;
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+ vdd-supply = <&vreg_l18b_1p8>;
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+ qcom,port-mapping = <1 2 3 7>;
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+ };
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+
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+ right_spkr: speaker@0,2 {
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+ compatible = "sdw10217020200";
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+ reg = <0 2>;
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+ powerdown-gpios = <&tlmm 158 GPIO_ACTIVE_LOW>;
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+ #sound-dai-cells = <0>;
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+ sound-name-prefix = "SpkrRight";
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+ #thermal-sensor-cells = <0>;
47+
+ vdd-supply = <&vreg_l18b_1p8>;
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+ qcom,port-mapping = <4 5 6 8>;
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+ };
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+};
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+
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&tlmm {
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gpio-reserved-ranges = <32 2>, /* ADSP */
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<48 4>; /* NFC */
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--
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2.34.1
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