RP1 PIO support

arch/arm/boot/dts/overlays/Makefile

@@ -219,6 +219,7 @@ dtbo-$(CONFIG_ARCH_BCM2835) += \
 	pwm-2chan.dtbo \
 	pwm-gpio.dtbo \
 	pwm-ir-tx.dtbo \
+	pwm-pio.dtbo \
 	pwm1.dtbo \
 	qca7000.dtbo \
 	qca7000-uart0.dtbo \

arch/arm/boot/dts/overlays/README

@@ -3926,6 +3926,14 @@ Params: gpio_pin                Output GPIO (default 18)
         func                    Pin function (default 2 = Alt5)
 
 
+Name:   pwm-pio
+Info:   Configures a GPIO pin as PIO-assisted PWM output. Unlike hardware PWM,
+        this can be used on any RP1 GPIO in bank 0 (0-27). Up to 4 are
+        supported, assuming nothing else is using PIO. Pi 5 only.
+Load:   dtoverlay=pwm-pio,<param>=<val>
+Params: gpio                    Output GPIO (0-27, default 4)
+
+
 Name:   pwm1
 Info:   Configures one or two PWM channel on PWM1 (BCM2711 only)
         N.B.:

arch/arm/boot/dts/overlays/overlay_map.dts

@@ -240,6 +240,10 @@
 		bcm2712;
 	};
 
+	pwm-pio {
+		bcm2712;
+	};
+
 	pwm1 {
 		bcm2711;
 	};

arch/arm/boot/dts/overlays/pwm-pio-overlay.dts

@@ -0,0 +1,39 @@
+// SPDX-License-Identifier: GPL-2.0
+// Device tree overlay for RP1 PIO PWM.
+/dts-v1/;
+/plugin/;
+
+/ {
+	compatible = "brcm,bcm2712";
+
+	fragment@0 {
+		target = <&gpio>;
+		__overlay__ {
+			pwm_pio_pins: pwm_pio_pins@4 {
+				brcm,pins = <4>; /* gpio 4 */
+				function = "pio";
+				bias-disable;
+			};
+		};
+	};
+
+	fragment@1 {
+		target-path = "/";
+		__overlay__ {
+			pwm_pio: pwm_pio@4 {
+				  compatible = "raspberrypi,pwm-pio-rp1";
+				  pinctrl-names = "default";
+				  pinctrl-0 = <&pwm_pio_pins>;
+				  gpios = <&gpio 4 0>;
+			};
+		};
+	};
+
+	__overrides__ {
+		gpio = <&pwm_pio>,"gpios:4",
+		       <&pwm_pio_pins>,"brcm,pins:0",
+		       /* modify reg values to allow multiple instantiation */
+		       <&pwm_pio>,"reg:0",
+		       <&pwm_pio_pins>,"reg:0";
+	};
+};

arch/arm64/boot/dts/broadcom/bcm2712-rpi-5-b.dts

@@ -195,7 +195,7 @@ i2c_rp1boot: &_i2c3 { };
 	// This is the RP1 peripheral space
 	ranges = <0xc0 0x40000000
 		  0x02000000 0x00 0x00000000
-		  0x00 0x00400000>;
+		  0x00 0x00410000>;
 
 	dma-ranges =
 	// inbound RP1 1x_xxxxxxxx -> PCIe 1x_xxxxxxxx
@@ -207,7 +207,7 @@ i2c_rp1boot: &_i2c3 { };
 	// This allows the RP1 DMA controller to address RP1 hardware
 		     <0xc0 0x40000000
 		      0x02000000 0x0 0x00000000
-		      0x0 0x00400000>,
+		      0x0 0x00410000>,
 
 	// inbound RP1 0x_xxxxxxxx -> PCIe 1x_xxxxxxxx
 		     <0x00 0x00000000

arch/arm64/boot/dts/broadcom/bcm2712-rpi-cm5.dtsi

@@ -176,7 +176,7 @@ i2c_rp1boot: &_i2c3 { };
 	// This is the RP1 peripheral space
 	ranges = <0xc0 0x40000000
 		  0x02000000 0x00 0x00000000
-		  0x00 0x00400000>;
+		  0x00 0x00410000>;
 
 	dma-ranges =
 	// inbound RP1 1x_xxxxxxxx -> PCIe 1x_xxxxxxxx
@@ -188,7 +188,7 @@ i2c_rp1boot: &_i2c3 { };
 	// This allows the RP1 DMA controller to address RP1 hardware
 		     <0xc0 0x40000000
 		      0x02000000 0x0 0x00000000
-		      0x0 0x00400000>,
+		      0x0 0x00410000>,
 
 	// inbound RP1 0x_xxxxxxxx -> PCIe 1x_xxxxxxxx
 		     <0x00 0x00000000

arch/arm64/boot/dts/broadcom/bcm2712-rpi.dtsi

@@ -97,6 +97,10 @@
 	};
 };
 
+pio: &rp1_pio {
+	status = "okay";
+};
+
 / {
 	chosen: chosen {
 		bootargs = "reboot=w coherent_pool=1M 8250.nr_uarts=1 pci=pcie_bus_safe cgroup_disable=memory numa_policy=interleave";
@@ -129,6 +133,7 @@
 		i2c12 = &i2c_rp1boot;
 		mailbox = &mailbox;
 		mmc0 = &sdio1;
+		pio0 = &pio;
 		serial0 = &uart0;
 		serial1 = &uart1;
 		serial10 = &uart10;
@@ -294,6 +299,10 @@ pciex4: &pcie2 { };
 	status = "okay";
 };
 
+&rp1_mbox {
+	status = "okay";
+};
+
 /* Add some gpiomem nodes to make the devices accessible to userspace.
  * /dev/gpiomem<n> should expose the registers for the interface with DT alias
  * gpio<n>.

arch/arm64/boot/dts/broadcom/rp1.dtsi

@@ -13,6 +13,14 @@
 
 		// ranges and dma-ranges must be provided by the includer
 
+		rp1_mbox: mailbox@8000 {
+			compatible = "raspberrypi,rp1-mbox";
+			status = "disabled";
+			reg = <0xc0 0x40008000  0x0 0x4000>;  // SYSCFG
+			interrupts = <RP1_INT_SYSCFG IRQ_TYPE_LEVEL_HIGH>;
+			#mbox-cells = <1>;
+		};
+
 		rp1_clocks: clocks@18000 {
 			compatible = "raspberrypi,rp1-clocks";
 			#clock-cells = <1>;
@@ -1020,6 +1028,18 @@
 			status = "disabled";
 		};
 
+		rp1_pio: pio@178000 {
+			reg = <0xc0 0x40178000  0x0 0x20>;
+			compatible = "raspberrypi,rp1-pio";
+			firmware = <&rp1_firmware>;
+			dmas = <&rp1_dma RP1_DMA_PIO_CH0_TX>, <&rp1_dma RP1_DMA_PIO_CH0_RX>,
+				   <&rp1_dma RP1_DMA_PIO_CH1_TX>, <&rp1_dma RP1_DMA_PIO_CH1_RX>,
+				   <&rp1_dma RP1_DMA_PIO_CH2_TX>, <&rp1_dma RP1_DMA_PIO_CH2_RX>,
+				   <&rp1_dma RP1_DMA_PIO_CH3_TX>, <&rp1_dma RP1_DMA_PIO_CH3_RX>;
+			dma-names = "tx0", "rx0", "tx1", "rx1", "tx2", "rx2", "tx3", "rx3";
+			status = "disabled";
+		};
+
 		rp1_mmc0: mmc@180000 {
 			reg = <0xc0 0x40180000  0x0 0x100>;
 			compatible = "raspberrypi,rp1-dwcmshc";
@@ -1183,6 +1203,19 @@
 			assigned-clocks        = <&rp1_clocks RP1_CLK_DPI>;
 			assigned-clock-parents = <&rp1_clocks RP1_PLL_VIDEO>;
 		};
+
+		sram: sram@400000 {
+			compatible = "mmio-sram";
+			reg = <0xc0 0x40400000  0x0 0x10000>;
+			#address-cells = <1>;
+			#size-cells = <1>;
+			ranges = <0  0xc0 0x40400000  0x10000>;
+
+			rp1_fw_shmem: shmem@ff00 {
+				compatible = "raspberrypi,rp1-shmem";
+				reg = <0xff00 0x100>; // firmware mailbox buffer
+			};
+		};
 	};
 };
 
@@ -1281,6 +1314,12 @@
 };
 
 / {
+	rp1_firmware: rp1_firmware {
+		compatible = "raspberrypi,rp1-firmware", "simple-mfd";
+		mboxes = <&rp1_mbox 0>;
+		shmem = <&rp1_fw_shmem>;
+	};
+
 	rp1_vdd_3v3: rp1_vdd_3v3 {
 		compatible = "regulator-fixed";
 		regulator-name = "vdd-3v3";

arch/arm64/configs/bcm2711_defconfig

@@ -474,6 +474,8 @@ CONFIG_ATA_OVER_ETH=m
 CONFIG_BLK_DEV_RBD=m
 CONFIG_BLK_DEV_NVME=y
 CONFIG_NVME_HWMON=y
+CONFIG_RP1_PIO=m
+CONFIG_SRAM=y
 CONFIG_EEPROM_AT24=m
 CONFIG_EEPROM_AT25=m
 CONFIG_TI_ST=m
@@ -1476,6 +1478,7 @@ CONFIG_COMMON_CLK_RP1_SDIO=y
 CONFIG_CLK_RASPBERRYPI=y
 CONFIG_MAILBOX=y
 CONFIG_BCM2835_MBOX=y
+CONFIG_MBOX_RP1=m
 CONFIG_BCM2712_IOMMU=y
 CONFIG_RASPBERRYPI_POWER=y
 CONFIG_IIO=m
@@ -1511,6 +1514,7 @@ CONFIG_PWM_BCM2835=m
 CONFIG_PWM_BRCMSTB=y
 CONFIG_PWM_GPIO=m
 CONFIG_PWM_PCA9685=m
+CONFIG_PWM_PIO_RP1=m
 CONFIG_PWM_RASPBERRYPI_POE=m
 CONFIG_PWM_RP1=y
 CONFIG_BCM2712_MIP=y

arch/arm64/configs/bcm2712_defconfig

@@ -477,6 +477,8 @@ CONFIG_ATA_OVER_ETH=m
 CONFIG_BLK_DEV_RBD=m
 CONFIG_BLK_DEV_NVME=y
 CONFIG_NVME_HWMON=y
+CONFIG_RP1_PIO=m
+CONFIG_SRAM=y
 CONFIG_EEPROM_AT24=m
 CONFIG_EEPROM_AT25=m
 CONFIG_TI_ST=m
@@ -1479,6 +1481,7 @@ CONFIG_COMMON_CLK_RP1_SDIO=y
 CONFIG_CLK_RASPBERRYPI=y
 CONFIG_MAILBOX=y
 CONFIG_BCM2835_MBOX=y
+CONFIG_MBOX_RP1=m
 CONFIG_BCM2712_IOMMU=y
 CONFIG_RASPBERRYPI_POWER=y
 CONFIG_IIO=m
@@ -1514,6 +1517,7 @@ CONFIG_PWM_BCM2835=m
 CONFIG_PWM_BRCMSTB=y
 CONFIG_PWM_GPIO=m
 CONFIG_PWM_PCA9685=m
+CONFIG_PWM_PIO_RP1=m
 CONFIG_PWM_RASPBERRYPI_POE=m
 CONFIG_PWM_RP1=y
 CONFIG_BCM2712_MIP=y

drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c

@@ -536,9 +536,11 @@ static void dma_chan_issue_pending(struct dma_chan *dchan)
 {
 	struct axi_dma_chan *chan = dchan_to_axi_dma_chan(dchan);
 	unsigned long flags;
+	bool was_empty;
 
 	spin_lock_irqsave(&chan->vc.lock, flags);
-	if (vchan_issue_pending(&chan->vc))
+	was_empty = list_empty(&chan->vc.desc_issued);
+	if (vchan_issue_pending(&chan->vc) && was_empty)
 		axi_chan_start_first_queued(chan);
 	spin_unlock_irqrestore(&chan->vc.lock, flags);
 }

drivers/firmware/Kconfig

@@ -153,6 +153,15 @@ config RASPBERRYPI_FIRMWARE
 	  This option enables support for communicating with the firmware on the
 	  Raspberry Pi.
 
+config FIRMWARE_RP1
+	tristate "RP1 Firmware Driver"
+	depends on MBOX_RP1
+	help
+	  The Raspberry Pi RP1 processor presents a firmware
+	  interface using shared memory and a mailbox. To enable
+	  the driver that communicates with it, say Y. Otherwise,
+	  say N.
+
 config FW_CFG_SYSFS
 	tristate "QEMU fw_cfg device support in sysfs"
 	depends on SYSFS && (ARM || ARM64 || PARISC || PPC_PMAC || SPARC || X86)

drivers/firmware/Makefile

@@ -17,6 +17,7 @@ obj-$(CONFIG_ISCSI_IBFT)	+= iscsi_ibft.o
 obj-$(CONFIG_FIRMWARE_MEMMAP)	+= memmap.o
 obj-$(CONFIG_MTK_ADSP_IPC)	+= mtk-adsp-ipc.o
 obj-$(CONFIG_RASPBERRYPI_FIRMWARE) += raspberrypi.o
+obj-$(CONFIG_FIRMWARE_RP1)	+= rp1.o
 obj-$(CONFIG_FW_CFG_SYSFS)	+= qemu_fw_cfg.o
 obj-$(CONFIG_QCOM_SCM)		+= qcom-scm.o
 qcom-scm-objs += qcom_scm.o qcom_scm-smc.o qcom_scm-legacy.o