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borneoaborneoa
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OpenOCD: fix code indentation
Fix checkpatch errors ERROR:SUSPECT_CODE_INDENT: suspect code indent for conditional statements Change-Id: I94d4fa5720c25dd2fb0334a824cd9026babcce4e Signed-off-by: Antonio Borneo <[email protected]> Reviewed-on: https://review.openocd.org/c/openocd/+/8497 Tested-by: jenkins
1 parent 8e89a8a commit 3099547

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17 files changed

+72
-83
lines changed

17 files changed

+72
-83
lines changed

‎src/flash/nor/fespi.c‎

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -751,9 +751,9 @@ static int fespi_probe(struct flash_bank *bank)
751751
target_device->name, bank->base);
752752

753753
} else {
754-
LOG_DEBUG("Assuming FESPI as specified at address " TARGET_ADDR_FMT
755-
" with ctrl at " TARGET_ADDR_FMT, fespi_info->ctrl_base,
756-
bank->base);
754+
LOG_DEBUG("Assuming FESPI as specified at address " TARGET_ADDR_FMT
755+
" with ctrl at " TARGET_ADDR_FMT, fespi_info->ctrl_base,
756+
bank->base);
757757
}
758758

759759
/* read and decode flash ID; returns in SW mode */

‎src/flash/nor/kinetis_ke.c‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1005,7 +1005,7 @@ static int kinetis_ke_write(struct flash_bank *bank, const uint8_t *buffer,
10051005

10061006
result = kinetis_ke_stop_watchdog(bank->target);
10071007
if (result != ERROR_OK)
1008-
return result;
1008+
return result;
10091009

10101010
result = kinetis_ke_prepare_flash(bank);
10111011
if (result != ERROR_OK)

‎src/flash/nor/niietcm4.c‎

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -311,7 +311,7 @@ static int niietcm4_uflash_page_erase(struct flash_bank *bank, int page_num, int
311311
/* status check */
312312
retval = niietcm4_uopstatus_check(bank);
313313
if (retval != ERROR_OK)
314-
return retval;
314+
return retval;
315315

316316
return retval;
317317
}
@@ -394,7 +394,7 @@ COMMAND_HANDLER(niietcm4_handle_uflash_read_byte_command)
394394
uint32_t uflash_data;
395395

396396
if (strcmp("info", CMD_ARGV[0]) == 0)
397-
uflash_cmd = UFMC_MAGIC_KEY | UFMC_READ_IFB;
397+
uflash_cmd = UFMC_MAGIC_KEY | UFMC_READ_IFB;
398398
else if (strcmp("main", CMD_ARGV[0]) == 0)
399399
uflash_cmd = UFMC_MAGIC_KEY | UFMC_READ;
400400
else
@@ -539,7 +539,7 @@ COMMAND_HANDLER(niietcm4_handle_uflash_erase_command)
539539
int mem_type;
540540

541541
if (strcmp("info", CMD_ARGV[0]) == 0)
542-
mem_type = 1;
542+
mem_type = 1;
543543
else if (strcmp("main", CMD_ARGV[0]) == 0)
544544
mem_type = 0;
545545
else

‎src/flash/nor/psoc4.c‎

Lines changed: 5 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -384,15 +384,15 @@ static int psoc4_get_silicon_id(struct flash_bank *bank, uint32_t *silicon_id, u
384384
* bit 7..0 family ID (lowest 8 bits)
385385
*/
386386
if (silicon_id)
387-
*silicon_id = ((part0 & 0x0000ffff) << 16)
388-
| ((part0 & 0x00ff0000) >> 8)
389-
| (part1 & 0x000000ff);
387+
*silicon_id = ((part0 & 0x0000ffff) << 16)
388+
| ((part0 & 0x00ff0000) >> 8)
389+
| (part1 & 0x000000ff);
390390

391391
if (family_id)
392-
*family_id = part1 & 0x0fff;
392+
*family_id = part1 & 0x0fff;
393393

394394
if (protection)
395-
*protection = (part1 >> 12) & 0x0f;
395+
*protection = (part1 >> 12) & 0x0f;
396396

397397
return ERROR_OK;
398398
}

‎src/helper/log.c‎

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -272,10 +272,10 @@ void log_init(void)
272272
if (debug_env) {
273273
int value;
274274
int retval = parse_int(debug_env, &value);
275-
if (retval == ERROR_OK &&
276-
debug_level >= LOG_LVL_SILENT &&
277-
debug_level <= LOG_LVL_DEBUG_IO)
278-
debug_level = value;
275+
if (retval == ERROR_OK
276+
&& debug_level >= LOG_LVL_SILENT
277+
&& debug_level <= LOG_LVL_DEBUG_IO)
278+
debug_level = value;
279279
}
280280

281281
if (!log_output)

‎src/rtos/hwthread.c‎

Lines changed: 3 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -154,9 +154,8 @@ static int hwthread_update_threads(struct rtos *rtos)
154154
if (curr->debug_reason == DBG_REASON_SINGLESTEP) {
155155
current_reason = curr->debug_reason;
156156
current_thread = tid;
157-
} else
158-
/* multiple breakpoints, prefer gdbs' threadid */
159-
if (curr->debug_reason == DBG_REASON_BREAKPOINT) {
157+
} else if (curr->debug_reason == DBG_REASON_BREAKPOINT) {
158+
/* multiple breakpoints, prefer gdbs' threadid */
160159
if (tid == rtos->current_threadid)
161160
current_thread = tid;
162161
}
@@ -176,8 +175,7 @@ static int hwthread_update_threads(struct rtos *rtos)
176175
curr->debug_reason == DBG_REASON_BREAKPOINT) {
177176
current_reason = curr->debug_reason;
178177
current_thread = tid;
179-
} else
180-
if (curr->debug_reason == DBG_REASON_DBGRQ) {
178+
} else if (curr->debug_reason == DBG_REASON_DBGRQ) {
181179
if (tid == rtos->current_threadid)
182180
current_thread = tid;
183181
}

‎src/rtos/linux.c‎

Lines changed: 3 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -624,7 +624,7 @@ static struct threads *liste_add_task(struct threads *task_list, struct threads
624624
{
625625
t->next = NULL;
626626

627-
if (!*last)
627+
if (!*last) {
628628
if (!task_list) {
629629
task_list = t;
630630
return task_list;
@@ -637,7 +637,8 @@ static struct threads *liste_add_task(struct threads *task_list, struct threads
637637
temp->next = t;
638638
*last = t;
639639
return task_list;
640-
} else {
640+
}
641+
} else {
641642
(*last)->next = t;
642643
*last = t;
643644
return task_list;

‎src/target/aarch64.c‎

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -2908,9 +2908,9 @@ static int aarch64_jim_configure(struct target *target, struct jim_getopt_info *
29082908

29092909
pc = (struct aarch64_private_config *)target->private_config;
29102910
if (!pc) {
2911-
pc = calloc(1, sizeof(struct aarch64_private_config));
2912-
pc->adiv5_config.ap_num = DP_APSEL_INVALID;
2913-
target->private_config = pc;
2911+
pc = calloc(1, sizeof(struct aarch64_private_config));
2912+
pc->adiv5_config.ap_num = DP_APSEL_INVALID;
2913+
target->private_config = pc;
29142914
}
29152915

29162916
/*

‎src/target/arc.c‎

Lines changed: 8 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -388,7 +388,7 @@ static int arc_build_reg_cache(struct target *target)
388388
}
389389

390390
list_for_each_entry(reg_desc, &arc->aux_reg_descriptions, list) {
391-
CHECK_RETVAL(arc_init_reg(target, &reg_list[i], reg_desc, i));
391+
CHECK_RETVAL(arc_init_reg(target, &reg_list[i], reg_desc, i));
392392

393393
LOG_TARGET_DEBUG(target, "reg n=%3li name=%3s group=%s feature=%s", i,
394394
reg_list[i].name, reg_list[i].group,
@@ -464,7 +464,7 @@ static int arc_build_bcr_reg_cache(struct target *target)
464464
}
465465

466466
list_for_each_entry(reg_desc, &arc->bcr_reg_descriptions, list) {
467-
CHECK_RETVAL(arc_init_reg(target, &reg_list[i], reg_desc, gdb_regnum));
467+
CHECK_RETVAL(arc_init_reg(target, &reg_list[i], reg_desc, gdb_regnum));
468468
/* BCRs always semantically, they are just read-as-zero, if there is
469469
* not real register. */
470470
reg_list[i].exist = true;
@@ -719,14 +719,14 @@ static int arc_configure(struct target *target)
719719
LOG_TARGET_DEBUG(target, "Configuring ARC ICCM and DCCM");
720720

721721
/* Configuring DCCM if DCCM_BUILD and AUX_DCCM are known registers. */
722-
if (arc_reg_get_by_name(target->reg_cache, "dccm_build", true) &&
723-
arc_reg_get_by_name(target->reg_cache, "aux_dccm", true))
724-
CHECK_RETVAL(arc_configure_dccm(target));
722+
if (arc_reg_get_by_name(target->reg_cache, "dccm_build", true)
723+
&& arc_reg_get_by_name(target->reg_cache, "aux_dccm", true))
724+
CHECK_RETVAL(arc_configure_dccm(target));
725725

726726
/* Configuring ICCM if ICCM_BUILD and AUX_ICCM are known registers. */
727-
if (arc_reg_get_by_name(target->reg_cache, "iccm_build", true) &&
728-
arc_reg_get_by_name(target->reg_cache, "aux_iccm", true))
729-
CHECK_RETVAL(arc_configure_iccm(target));
727+
if (arc_reg_get_by_name(target->reg_cache, "iccm_build", true)
728+
&& arc_reg_get_by_name(target->reg_cache, "aux_iccm", true))
729+
CHECK_RETVAL(arc_configure_iccm(target));
730730

731731
return ERROR_OK;
732732
}
@@ -1067,9 +1067,7 @@ static int arc_poll(struct target *target)
10671067
LOG_TARGET_DEBUG(target, "Discrepancy of STATUS32[0] HALT bit and ARC_JTAG_STAT_RU, "
10681068
"target is still running");
10691069
}
1070-
10711070
} else if (target->state == TARGET_DEBUG_RUNNING) {
1072-
10731071
target->state = TARGET_HALTED;
10741072
LOG_TARGET_DEBUG(target, "ARC core is in debug running mode");
10751073

‎src/target/armv4_5.c‎

Lines changed: 11 additions & 11 deletions
Original file line numberDiff line numberDiff line change
@@ -1301,11 +1301,11 @@ int arm_get_gdb_reg_list(struct target *target,
13011301
*reg_list = malloc(sizeof(struct reg *) * (*reg_list_size));
13021302

13031303
for (i = 0; i < 16; i++)
1304-
(*reg_list)[i] = arm_reg_current(arm, i);
1304+
(*reg_list)[i] = arm_reg_current(arm, i);
13051305

13061306
/* For GDB compatibility, take FPA registers size into account and zero-fill it*/
13071307
for (i = 16; i < 24; i++)
1308-
(*reg_list)[i] = &arm_gdb_dummy_fp_reg;
1308+
(*reg_list)[i] = &arm_gdb_dummy_fp_reg;
13091309
(*reg_list)[24] = &arm_gdb_dummy_fps_reg;
13101310

13111311
(*reg_list)[25] = arm->cpsr;
@@ -1330,25 +1330,25 @@ int arm_get_gdb_reg_list(struct target *target,
13301330
*reg_list = malloc(sizeof(struct reg *) * (*reg_list_size));
13311331

13321332
for (i = 0; i < 16; i++)
1333-
(*reg_list)[i] = arm_reg_current(arm, i);
1333+
(*reg_list)[i] = arm_reg_current(arm, i);
13341334

13351335
for (i = 13; i < ARRAY_SIZE(arm_core_regs); i++) {
1336-
int reg_index = arm->core_cache->reg_list[i].number;
1336+
int reg_index = arm->core_cache->reg_list[i].number;
13371337

1338-
if (arm_core_regs[i].mode == ARM_MODE_MON
1338+
if (arm_core_regs[i].mode == ARM_MODE_MON
13391339
&& arm->core_type != ARM_CORE_TYPE_SEC_EXT
13401340
&& arm->core_type != ARM_CORE_TYPE_VIRT_EXT)
1341-
continue;
1342-
if (arm_core_regs[i].mode == ARM_MODE_HYP
1341+
continue;
1342+
if (arm_core_regs[i].mode == ARM_MODE_HYP
13431343
&& arm->core_type != ARM_CORE_TYPE_VIRT_EXT)
1344-
continue;
1345-
(*reg_list)[reg_index] = &(arm->core_cache->reg_list[i]);
1344+
continue;
1345+
(*reg_list)[reg_index] = &arm->core_cache->reg_list[i];
13461346
}
13471347

13481348
/* When we supply the target description, there is no need for fake FPA */
13491349
for (i = 16; i < 24; i++) {
1350-
(*reg_list)[i] = &arm_gdb_dummy_fp_reg;
1351-
(*reg_list)[i]->size = 0;
1350+
(*reg_list)[i] = &arm_gdb_dummy_fp_reg;
1351+
(*reg_list)[i]->size = 0;
13521352
}
13531353
(*reg_list)[24] = &arm_gdb_dummy_fps_reg;
13541354
(*reg_list)[24]->size = 0;

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