target: cortex_m: fix polling for target kept under reset

In multi-target SoC not all the targets are running simultaneously
and some target could be powered off or kept under reset.
Commit 4892e32 ("target/cortex_m: allow poll quickly get out
of TARGET_RESET state") does not considers the case of a target
that is kept in reset and expects the target to change state from
TARGET_RESET immediately.
This causes OpenOCD to log continuously:
	Info : [stm32mp15x.cm4] external reset detected
	Info : [stm32mp15x.cm4] external reset detected
	Info : [stm32mp15x.cm4] external reset detected

Read again dhcsr to detect the 'stable' reset status and quit,
waiting for next poll to re-check the target's status.

Change-Id: Ic66029b988404a1599bb99bc66d4a8845b8b02c6
Signed-off-by: Antonio Borneo <[email protected]>
Fixes: 4892e32 ("target/cortex_m: allow poll quickly get out of TARGET_RESET state")
Reviewed-on: https://review.openocd.org/c/openocd/+/8399
Reviewed-by: Tomas Vanek <[email protected]>
Tested-by: jenkins

Author: borneoa

src/target/cortex_m.c

@@ -989,6 +989,18 @@ static int cortex_m_poll_one(struct target *target)
 			 * and keep it until the next poll to allow its detection */
 			return ERROR_OK;
 		}
+
+		/* refresh status bits */
+		retval = cortex_m_read_dhcsr_atomic_sticky(target);
+		if (retval != ERROR_OK)
+			return retval;
+
+		/* If still under reset, quit and re-check at next poll */
+		if (cortex_m->dcb_dhcsr_cumulated_sticky & S_RESET_ST) {
+			cortex_m->dcb_dhcsr_cumulated_sticky &= ~S_RESET_ST;
+			return ERROR_OK;
+		}
+
 		/* S_RESET_ST was expected (in a reset command). Continue processing
 		 * to quickly get out of TARGET_RESET state */
 	}