target: drop last instances of 'target->cmd_name'

The helper function 'target_name()' or, better, the log functions
'LOG_TARGET_xxx(target, ...)' should be used in place of taking
the target name directly from 'target->cmd_name'.

Replace the remaining instances in the code.

While there:
- address some indentation,
- drop trailing punctuation in log message,
- replace one LOG WARNING with LOG_TARGET_WARNING.

Change-Id: Ie6cf4c174ffe91b975c983e4697c735766267041
Signed-off-by: Antonio Borneo <[email protected]>
Reviewed-on: https://review.openocd.org/c/openocd/+/8806
Tested-by: jenkins
Reviewed-by: zapb <[email protected]>

Author: borneoa

src/target/armv7a.c

@@ -101,14 +101,14 @@ static int armv7a_read_midr(struct target *target)
 	armv7a->arch = (midr >> 16) & 0xf;
 	armv7a->variant = (midr >> 20) & 0xf;
 	armv7a->implementor = (midr >> 24) & 0xff;
-	LOG_DEBUG("%s rev %" PRIx32 ", partnum %" PRIx32 ", arch %" PRIx32
-			 ", variant %" PRIx32 ", implementor %" PRIx32,
-		 target->cmd_name,
-		 armv7a->rev,
-		 armv7a->partnum,
-		 armv7a->arch,
-		 armv7a->variant,
-		 armv7a->implementor);
+	LOG_TARGET_DEBUG(target,
+		"rev %" PRIx32 ", partnum %" PRIx32 ", arch %" PRIx32
+		", variant %" PRIx32 ", implementor %" PRIx32,
+		armv7a->rev,
+		armv7a->partnum,
+		armv7a->arch,
+		armv7a->variant,
+		armv7a->implementor);
 
 done:
 	dpm->finish(dpm);

src/target/cortex_a.c

@@ -2923,14 +2923,12 @@ static int cortex_a_examine_first(struct target *target)
 	armv7a->debug_ap->memaccess_tck = 80;
 
 	if (!target->dbgbase_set) {
-		LOG_DEBUG("%s's dbgbase is not set, trying to detect using the ROM table",
-			  target->cmd_name);
+		LOG_TARGET_DEBUG(target, "dbgbase is not set, trying to detect using the ROM table");
 		/* Lookup Processor DAP */
 		retval = dap_lookup_cs_component(armv7a->debug_ap, ARM_CS_C9_DEVTYPE_CORE_DEBUG,
 				&armv7a->debug_base, target->coreid);
 		if (retval != ERROR_OK) {
-			LOG_ERROR("Can't detect %s's dbgbase from the ROM table; you need to specify it explicitly.",
-				  target->cmd_name);
+			LOG_TARGET_ERROR(target, "Can't detect dbgbase from the ROM table; you need to specify it explicitly");
 			return retval;
 		}
 		LOG_DEBUG("Detected core %" PRId32 " dbgbase: " TARGET_ADDR_FMT,
@@ -2939,8 +2937,9 @@ static int cortex_a_examine_first(struct target *target)
 		armv7a->debug_base = target->dbgbase;
 
 	if ((armv7a->debug_base & (1UL<<31)) == 0)
-		LOG_WARNING("Debug base address for target %s has bit 31 set to 0. Access to debug registers will likely fail!\n"
-			    "Please fix the target configuration.", target_name(target));
+		LOG_TARGET_WARNING(target,
+			"Debug base address has bit 31 set to 0. Access to debug registers will likely fail!\n"
+			"Please fix the target configuration");
 
 	retval = mem_ap_read_atomic_u32(armv7a->debug_ap,
 			armv7a->debug_base + CPUDBG_DIDR, &didr);

src/target/espressif/esp32_apptrace.c

@@ -649,7 +649,7 @@ static int esp32_apptrace_wait4halt(struct esp32_apptrace_cmd_ctx *ctx, struct t
 		if (res != ERROR_OK)
 			return res;
 		if (target->state == TARGET_HALTED) {
-			LOG_USER("%s: HALTED", target->cmd_name);
+			LOG_TARGET_USER(target, "HALTED");
 			break;
 		}
 		alive_sleep(500);

src/target/espressif/esp_xtensa_apptrace.c

@@ -277,7 +277,7 @@ static int esp_xtensa_swdbg_activate(struct target *target, int enab)
 	xtensa_dm_queue_tdi_idle(&xtensa->dbg_mod);
 	int res = xtensa_dm_queue_execute(&xtensa->dbg_mod);
 	if (res != ERROR_OK) {
-		LOG_ERROR("%s: writing DCR failed!", target->cmd_name);
+		LOG_TARGET_ERROR(target, "writing DCR failed");
 		return res;
 	}