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target/riscv: replaced repeating ternary operator with variable
Replaced repeating ternary operator with variable Signed-off-by: Farid Khaydari <[email protected]>
1 parent ea8f9d5 commit d5c2604

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+40
-33
lines changed

1 file changed

+40
-33
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src/target/riscv/riscv-013.c

Lines changed: 40 additions & 33 deletions
Original file line numberDiff line numberDiff line change
@@ -3501,41 +3501,39 @@ static mem_access_result_t mem_should_skip_progbuf(struct target *target,
35013501
const riscv_mem_access_args_t args)
35023502
{
35033503
assert(riscv_mem_access_is_valid(args));
3504+
const char *const access_type =
3505+
riscv_mem_access_is_read(args) ? "read" : "write";
35043506

3505-
const bool is_read = riscv_mem_access_is_read(args);
35063507
if (!has_sufficient_progbuf(target, 1)) {
35073508
LOG_TARGET_DEBUG(target, "Skipping mem %s via progbuf "
3508-
"- progbuf not present", is_read ? "read" : "write");
3509+
"- progbuf not present", access_type);
35093510
return MEM_ACCESS_SKIPPED_PROGBUF_NOT_PRESENT;
35103511
}
35113512
if (!has_sufficient_progbuf(target, 3)) {
3512-
LOG_TARGET_DEBUG(target, "Skipping mem %s via progbuf - insufficient progbuf size.",
3513-
is_read ? "read" : "write");
3513+
LOG_TARGET_DEBUG(target, "Skipping mem %s via progbuf - "
3514+
"insufficient progbuf size.", access_type);
35143515
return MEM_ACCESS_SKIPPED_PROGBUF_INSUFFICIENT;
35153516
}
35163517
if (target->state != TARGET_HALTED) {
3517-
LOG_TARGET_DEBUG(target,
3518-
"Skipping mem %s via progbuf - target not halted.",
3519-
is_read ? "read" : "write");
3518+
LOG_TARGET_DEBUG(target, "Skipping mem %s via progbuf - "
3519+
"target not halted.", access_type);
35203520
return MEM_ACCESS_SKIPPED_TARGET_NOT_HALTED;
35213521
}
35223522
if (riscv_xlen(target) < args.size * 8) {
3523-
LOG_TARGET_DEBUG(target,
3524-
"Skipping mem %s via progbuf - "
3525-
"XLEN (%d) is too short for %d-bit memory access.",
3526-
is_read ? "read" : "write", riscv_xlen(target), args.size * 8);
3523+
LOG_TARGET_DEBUG(target, "Skipping mem %s via progbuf - "
3524+
"XLEN (%d) is too short for %d-bit memory args.",
3525+
access_type, riscv_xlen(target), args.size * 8);
35273526
return MEM_ACCESS_SKIPPED_XLEN_TOO_SHORT;
35283527
}
35293528
if (args.size > 8) {
3530-
LOG_TARGET_DEBUG(target,
3531-
"Skipping mem %s via progbuf - unsupported size.",
3532-
is_read ? "read" : "write");
3529+
LOG_TARGET_DEBUG(target, "Skipping mem %s via progbuf - "
3530+
"unsupported size.", access_type);
35333531
return MEM_ACCESS_SKIPPED_UNSUPPORTED_ACCESS_SIZE;
35343532
}
3535-
if ((sizeof(args.address) * 8 > riscv_xlen(target)) && (args.address >> riscv_xlen(target))) {
3536-
LOG_TARGET_DEBUG(target,
3537-
"Skipping mem %s via progbuf - progbuf only supports %u-bit address.",
3538-
is_read ? "read" : "write", riscv_xlen(target));
3533+
if ((sizeof(args.address) * 8 > riscv_xlen(target))
3534+
&& (args.address >> riscv_xlen(target))) {
3535+
LOG_TARGET_DEBUG(target, "Skipping mem %s via progbuf - "
3536+
"progbuf only supports %u-bit address.", access_type, riscv_xlen(target));
35393537
return MEM_ACCESS_SKIPPED_TOO_LARGE_ADDRESS;
35403538
}
35413539

@@ -3549,21 +3547,26 @@ mem_should_skip_sysbus(struct target *target, const riscv_mem_access_args_t args
35493547

35503548
RISCV013_INFO(info);
35513549
const bool is_read = riscv_mem_access_is_read(args);
3550+
const char *const access_type = is_read ? "read" : "write";
3551+
35523552
if (!sba_supports_access(target, args.size)) {
3553-
LOG_TARGET_DEBUG(target, "Skipping mem %s via system bus - unsupported size.",
3554-
is_read ? "read" : "write");
3553+
LOG_TARGET_DEBUG(target, "Skipping mem %s via system bus - "
3554+
"unsupported size.", access_type);
35553555
return MEM_ACCESS_SKIPPED_UNSUPPORTED_ACCESS_SIZE;
35563556
}
35573557
unsigned int sbasize = get_field(info->sbcs, DM_SBCS_SBASIZE);
3558-
if ((sizeof(args.address) * 8 > sbasize) && (args.address >> sbasize)) {
3559-
LOG_TARGET_DEBUG(target, "Skipping mem %s via system bus - sba only supports %u-bit address.",
3560-
is_read ? "read" : "write", sbasize);
3558+
if ((sizeof(args.address) * 8 > sbasize)
3559+
&& (args.address >> sbasize)) {
3560+
LOG_TARGET_DEBUG(target, "Skipping mem %s via system bus - "
3561+
"sba only supports %u-bit address.", access_type, sbasize);
35613562
return MEM_ACCESS_SKIPPED_TOO_LARGE_ADDRESS;
35623563
}
35633564
if (is_read && args.increment != args.size
3564-
&& (get_field(info->sbcs, DM_SBCS_SBVERSION) == 0 || args.increment != 0)) {
3565-
LOG_TARGET_DEBUG(target, "Skipping mem read via system bus - "
3566-
"sba reads only support size==increment or also size==0 for sba v1.");
3565+
&& (get_field(info->sbcs, DM_SBCS_SBVERSION) == 0
3566+
|| args.increment != 0)) {
3567+
LOG_TARGET_DEBUG(target, "Skipping mem %s via system bus - "
3568+
"sba %ss only support (size == increment) or also "
3569+
"size==0 for sba v1.", access_type, access_type);
35673570
return MEM_ACCESS_SKIPPED_UNSUPPORTED_INCREMENT_SIZE;
35683571
}
35693572

@@ -3576,21 +3579,25 @@ mem_should_skip_abstract(struct target *target, const riscv_mem_access_args_t ar
35763579
assert(riscv_mem_access_is_valid(args));
35773580

35783581
const bool is_read = riscv_mem_access_is_read(args);
3582+
const char *const access_type = is_read ? "read" : "write";
35793583
if (args.size > 8) {
35803584
/* TODO: Add 128b support if it's ever used. Involves modifying
35813585
read/write_abstract_arg() to work on two 64b values. */
3582-
LOG_TARGET_DEBUG(target, "Skipping mem %s via abstract access - unsupported size: %d bits",
3583-
is_read ? "read" : "write", args.size * 8);
3586+
LOG_TARGET_DEBUG(target, "Skipping mem %s via abstract access - "
3587+
"unsupported size: %d bits", access_type, args.size * 8);
35843588
return MEM_ACCESS_SKIPPED_UNSUPPORTED_ACCESS_SIZE;
35853589
}
3586-
if ((sizeof(args.address) * 8 > riscv_xlen(target)) && (args.address >> riscv_xlen(target))) {
3587-
LOG_TARGET_DEBUG(target, "Skipping mem %s via abstract access - abstract access only supports %u-bit address.",
3588-
is_read ? "read" : "write", riscv_xlen(target));
3590+
if ((sizeof(args.address) * 8 > riscv_xlen(target))
3591+
&& (args.address >> riscv_xlen(target))) {
3592+
LOG_TARGET_DEBUG(target, "Skipping mem %s via abstract access - "
3593+
"abstract access only supports %u-bit address.",
3594+
access_type, riscv_xlen(target));
35893595
return MEM_ACCESS_SKIPPED_TOO_LARGE_ADDRESS;
35903596
}
35913597
if (is_read && args.size != args.increment) {
3592-
LOG_TARGET_ERROR(target, "Skipping mem read via abstract access - "
3593-
"abstract command reads only support size==increment.");
3598+
LOG_TARGET_ERROR(target, "Skipping mem %s via abstract access - "
3599+
"abstract command %ss only support (size == increment).",
3600+
access_type, access_type);
35943601
return MEM_ACCESS_SKIPPED_UNSUPPORTED_INCREMENT_SIZE;
35953602
}
35963603
return MEM_ACCESS_OK;

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