Skip to content

Commit f9a1292

Browse files
authored
Merge pull request #1154 from en-sc/en-sc/dcsr-ebreak-halt-on-reset
target/riscv: avoid unnecessary `dcsr.ebreak*` update on reset
2 parents e3a47ca + 3fe20e7 commit f9a1292

File tree

1 file changed

+7
-1
lines changed

1 file changed

+7
-1
lines changed

src/target/riscv/riscv-013.c

Lines changed: 7 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -2837,6 +2837,12 @@ static int assert_reset(struct target *target)
28372837
return riscv013_invalidate_cached_progbuf(target);
28382838
}
28392839

2840+
static bool dcsr_ebreak_config_equals_reset_value(const struct target *target)
2841+
{
2842+
RISCV_INFO(r);
2843+
return !(r->riscv_ebreakm || r->riscv_ebreaks || r->riscv_ebreaku);
2844+
}
2845+
28402846
static int deassert_reset(struct target *target)
28412847
{
28422848
RISCV013_INFO(info);
@@ -2903,7 +2909,7 @@ static int deassert_reset(struct target *target)
29032909
target->state = TARGET_RUNNING;
29042910
target->debug_reason = DBG_REASON_NOTHALTED;
29052911
}
2906-
info->dcsr_ebreak_is_set = false;
2912+
info->dcsr_ebreak_is_set = dcsr_ebreak_config_equals_reset_value(target);
29072913

29082914
/* Ack reset and clear DM_DMCONTROL_HALTREQ if previously set */
29092915
control = 0;

0 commit comments

Comments
 (0)