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Allocate e_flags for landing pad and shadow stack #395

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Allocate e_flags for landing pad and shadow stack #395

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8 changes: 6 additions & 2 deletions riscv-elf.adoc
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Original file line number Diff line number Diff line change
Expand Up @@ -194,9 +194,9 @@ below.
[cols="1,2,1,1,3,5"]
[width=80%]
|===
| Bit 0 | Bits 1 - 2 | Bit 3 | Bit 4 | Bits 5 - 23 | Bits 24 - 31
| Bit 0 | Bits 1 - 2 | Bit 3 | Bit 4 | Bit 5 | Bit 6 | Bits 7 - 23 | Bits 24 - 31

| RVC | Float ABI | RVE | TSO | *Reserved* | *Non-standard extensions*
| RVC | Float ABI | RVE | TSO | CFI_LP | CFI_SS | *Reserved* | *Non-standard extensions*
|===

+
Expand Down Expand Up @@ -233,6 +233,10 @@ below.

EF_RISCV_TSO (0x0010)::: This bit is set when the binary requires the RVTSO
memory consistency model.
EF_RISCV_CFI_LP (0x0020)::: This bit is set when the binary has build with
landing pad.
EF_RISCV_CFI_SS (0x0040)::: This bit is set when the binary requires the Zimop
or Zicfiss extension.

Until such a time that the *Reserved* bits (0x00ffffe0) are allocated by future
versions of this specification, they shall not be set by standard software.
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