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This repository was archived by the owner on Sep 2, 2025. It is now read-only.

Commit b884fc6

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experimental pin mod
1 parent 1c63f6e commit b884fc6

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examples/virq.rs

Lines changed: 6 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -14,7 +14,7 @@ This can be applied for all the 52 interrupts declared in e310x/interrupts.rs.
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extern crate panic_halt;
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use hifive1::{ hal::prelude::*, hal::DeviceResources, pin, sprintln};
17+
use hifive1::{hal::prelude::*, hal::DeviceResources, pin, sprintln};
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use riscv::register::mstatus;
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use riscv_rt::entry;
@@ -56,8 +56,9 @@ fn main() -> ! {
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);
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/* Set GPIO4 (pin 12) as input */
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let gpio4 = pin!(gpio, dig12);
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_ = gpio4.into_pull_up_input();
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// let gpio4 = pin!(gpio, dig12);
60+
let input = gpio.pin4.into_pull_up_input();
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//let input = gpio4.into_pull_up_input();
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/* Wrapper for easy access */
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let mut plic = resources.core_peripherals.plic;
@@ -69,7 +70,8 @@ fn main() -> ! {
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hifive1::hal::e310x::PLIC::set_priority(
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&mut plic,
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hifive1::hal::e310x::Interrupt::GPIO4,
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e310x_hal::e310x::Priority::P7);
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e310x_hal::e310x::Priority::P7,
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);
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let gpio_block = &*hifive1::hal::e310x::GPIO0::ptr();
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/* Enable GPIO fall interrupts */
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gpio_block.fall_ie.write(|w| w.bits(1 << GPIO_N));

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