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csr: disalbe page fault delegation with nommu
Signed-off-by: Chih-Min Chao <[email protected]>
1 parent 217cbc5 commit 07315e9

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2 files changed

+7
-5
lines changed

2 files changed

+7
-5
lines changed

riscv/csrs.cc

Lines changed: 6 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -966,8 +966,11 @@ medeleg_csr_t::medeleg_csr_t(processor_t* const proc, const reg_t addr):
966966
| (1 << CAUSE_FETCH_GUEST_PAGE_FAULT)
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| (1 << CAUSE_LOAD_GUEST_PAGE_FAULT)
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| (1 << CAUSE_VIRTUAL_INSTRUCTION)
969-
| (1 << CAUSE_STORE_GUEST_PAGE_FAULT)
970-
) {
969+
| (1 << CAUSE_STORE_GUEST_PAGE_FAULT)),
970+
mmu_exceptions(0
971+
| (1 << CAUSE_FETCH_PAGE_FAULT)
972+
| (1 << CAUSE_LOAD_PAGE_FAULT)
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| (1 << CAUSE_STORE_PAGE_FAULT)) {
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}
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void medeleg_csr_t::verify_permissions(insn_t insn, bool write) const {
@@ -988,9 +991,7 @@ bool medeleg_csr_t::unlogged_write(const reg_t val) noexcept {
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| (1 << CAUSE_STORE_ACCESS)
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| (1 << CAUSE_USER_ECALL)
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| (1 << CAUSE_SUPERVISOR_ECALL)
991-
| (1 << CAUSE_FETCH_PAGE_FAULT)
992-
| (1 << CAUSE_LOAD_PAGE_FAULT)
993-
| (1 << CAUSE_STORE_PAGE_FAULT)
994+
| (proc->supports_impl(IMPL_MMU) ? mmu_exceptions : 0)
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| (proc->extension_enabled('H') ? hypervisor_exceptions : 0)
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| (1 << CAUSE_SOFTWARE_CHECK_FAULT)
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| (1 << CAUSE_HARDWARE_ERROR_FAULT)

riscv/csrs.h

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -468,6 +468,7 @@ class medeleg_csr_t: public basic_csr_t {
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virtual bool unlogged_write(const reg_t val) noexcept override;
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private:
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const reg_t hypervisor_exceptions;
471+
const reg_t mmu_exceptions;
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};
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class sip_csr_t: public mip_proxy_csr_t {

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