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Commit 3232ce1

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Implement Zvflqdot8f
1 parent e3dc14a commit 3232ce1

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6 files changed

+41
-0
lines changed

6 files changed

+41
-0
lines changed

disasm/isa_parser.cc

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -340,6 +340,8 @@ isa_parser_t::isa_parser_t(const char* str, const char *priv)
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extension_table[EXT_ZVQLDOT8I] = true;
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} else if (ext_str == "zvqldot16i") {
342342
extension_table[EXT_ZVQLDOT16I] = true;
343+
} else if (ext_str == "zvfqldot8f") {
344+
extension_table[EXT_ZVFQLDOT8F] = true;
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} else if (ext_str == "zvfwldot16bf") {
344346
extension_table[EXT_ZVFWLDOT16BF] = true;
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} else if (ext_str == "zvkt") {

riscv/insns/vfqldot_alt_vv.h

Lines changed: 17 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,17 @@
1+
VI_VFP_BASE;
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ZVLDOT_INIT(4);
3+
4+
#define COMMA ,
5+
6+
switch (P.VU.vsew) {
7+
case 8: {
8+
require_extension(EXT_ZVFQLDOT8F);
9+
if (P.VU.altfmt) {
10+
ZVLDOT_LOOP(uint8_t, uint8_t, float32_t, zvfqbdot8f_dot_acc<ofp8_e5m2 COMMA ofp8_e5m2>);
11+
} else {
12+
ZVLDOT_LOOP(uint8_t, uint8_t, float32_t, zvfqbdot8f_dot_acc<ofp8_e4m3 COMMA ofp8_e5m2>);
13+
}
14+
break;
15+
}
16+
default: require(false);
17+
}

riscv/insns/vfqldot_vv.h

Lines changed: 17 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,17 @@
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VI_VFP_BASE;
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ZVLDOT_INIT(4);
3+
4+
#define COMMA ,
5+
6+
switch (P.VU.vsew) {
7+
case 8: {
8+
require_extension(EXT_ZVFQLDOT8F);
9+
if (P.VU.altfmt) {
10+
ZVLDOT_LOOP(uint8_t, uint8_t, float32_t, zvfqbdot8f_dot_acc<ofp8_e5m2 COMMA ofp8_e4m3>);
11+
} else {
12+
ZVLDOT_LOOP(uint8_t, uint8_t, float32_t, zvfqbdot8f_dot_acc<ofp8_e4m3 COMMA ofp8_e4m3>);
13+
}
14+
break;
15+
}
16+
default: require(false);
17+
}

riscv/isa_parser.h

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -75,6 +75,7 @@ typedef enum {
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EXT_ZVFBDOT32F,
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EXT_ZVQLDOT8I,
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EXT_ZVQLDOT16I,
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EXT_ZVFQLDOT8F,
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EXT_ZVFWLDOT16BF,
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EXT_SSTC,
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EXT_ZAAMO,

riscv/riscv.mk.in

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1086,6 +1086,8 @@ riscv_insn_ext_zvldot = \
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vqldotu_vv \
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vqldots_vv \
10881088
vfwldot_vv \
1089+
vfqldot_vv \
1090+
vfqldot_alt_vv \
10891091

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riscv_insn_ext_zimop = \
10911093
mop_r_N \

riscv/vector_unit.cc

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -54,6 +54,8 @@ reg_t vectorUnit_t::vectorUnit_t::set_vl(int rd, int rs1, reg_t reqVL, reg_t new
5454
ill_altfmt = false;
5555
else if (p->extension_enabled(EXT_ZVQLDOT16I) && vsew == 16)
5656
ill_altfmt = false;
57+
else if (p->extension_enabled(EXT_ZVFQLDOT8F) && vsew == 8)
58+
ill_altfmt = false;
5759
else if (p->extension_enabled(EXT_ZVFWLDOT16BF) && vsew == 16)
5860
ill_altfmt = false;
5961
}

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