Partially revert #1987 to fix regrssion in vsra.vi and vssra.vi

Use arithmetic shifts, not logical shifts.

I broke them while fixing #1915.

Author: aswaterman

riscv/insns/vsra_vi.h

@@ -1,5 +1,5 @@
 // vsra.vi vd, vs2, zimm5
-VI_VI_ULOOP
+VI_VI_LOOP
 ({
-  vd = vs2 >> (zimm5 & (sew - 1));
+  vd = vs2 >> (insn.v_zimm5() & (sew - 1));
 })

riscv/insns/vssra_vi.h

@@ -1,8 +1,8 @@
 // vssra.vi vd, vs2, zimm5
-VI_VI_ULOOP
+VI_VI_LOOP
 ({
   VRM xrm = P.VU.get_vround_mode();
-  int sh = zimm5 & (sew - 1);
+  int sh = insn.v_zimm5() & (sew - 1);
   int128_t val = vs2;
 
   INT_ROUNDING(val, xrm, sh);