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Merge pull request #2095 from arrv-sc/arrv-sc/snippy-tests
ci: add testing with llvm-snippy
2 parents fe57ec5 + c44fd21 commit 4d6c71e

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13 files changed

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ci-tests/generate-snippy-test.sh

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#!/usr/bin/env bash
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set -e -x
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CONFIG="$1"
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RESULT="$2"
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BOOTCODE="$3"
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TRIPLE="$4"
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ARCH="$5"
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ABI="$6"
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CONFIGDIR=$(dirname "$CONFIG")
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base=$(basename "$CONFIG" .yaml)
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elf="$base".elf
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./llvm-snippy "$CONFIG" -o "$elf" --seed 1 -mtriple="$TRIPLE" -march="$ARCH" -riscv-disable-misaligned-access
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riscv64-linux-gnu-gcc -O0 -march="$ARCH" -mabi="$ABI" -T "$elf".ld -T "$CONFIGDIR"/linker-entry.ld "$elf" "$BOOTCODE" -nostdlib -static -o "$RESULT"
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ci-tests/generate-snippy-tests.sh

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#!/usr/bin/env bash
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set -e -x
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WORKDIR="$1"
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CONFIGDIR="$2"
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RESULTDIR="$WORKDIR"/snippy-tests
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mkdir -p "$WORKDIR"
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mkdir -p "$RESULTDIR"
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generate_script=`git rev-parse --show-toplevel`/ci-tests/generate-snippy-test.sh
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"$generate_script" "$CONFIGDIR"/basic.yaml "$RESULTDIR"/basic64.elf \
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"$CONFIGDIR"/boot-code.s riscv64-unknown-elf rv64i_zicsr lp64
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"$generate_script" "$CONFIGDIR"/basic.yaml "$RESULTDIR"/basic32.elf \
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"$CONFIGDIR"/boot-code.s riscv32-unknown-elf rv32i_zicsr ilp32
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"$generate_script" "$CONFIGDIR"/compressed.yaml "$RESULTDIR"/compressed64.elf \
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"$CONFIGDIR"/boot-code.s riscv64-unknown-elf rv64ic_zicsr lp64
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"$generate_script" "$CONFIGDIR"/compressed.yaml "$RESULTDIR"/compressed32.elf \
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"$CONFIGDIR"/boot-code.s riscv32-unknown-elf rv32ic_zicsr ilp32
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"$generate_script" "$CONFIGDIR"/double-fp.yaml "$RESULTDIR"/double64.elf \
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"$CONFIGDIR"/boot-code-f.s riscv64-unknown-elf rv64ifd_zicsr lp64d
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"$generate_script" "$CONFIGDIR"/double-fp.yaml "$RESULTDIR"/double32.elf \
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"$CONFIGDIR"/boot-code-f.s riscv32-unknown-elf rv32ifd_zicsr ilp32d
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"$generate_script" "$CONFIGDIR"/single-fp.yaml "$RESULTDIR"/float64.elf \
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"$CONFIGDIR"/boot-code-f.s riscv64-unknown-elf rv64if_zicsr lp64f
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"$generate_script" "$CONFIGDIR"/single-fp.yaml "$RESULTDIR"/float32.elf \
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"$CONFIGDIR"/boot-code-f.s riscv32-unknown-elf rv32if_zicsr ilp32f
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ci-tests/run-snippy-tests.sh

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#!/usr/bin/env bash
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set -x
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TESTDIR="$1"
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SPIKE_PATH="$2"
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error=0
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for testfile in "$TESTDIR"/*; do
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bitness=$(basename "$testfile" .elf | grep -o "[0-9]\+")
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if ! timeout --foreground 5s "$SPIKE_PATH" -l --log-commits --isa rv"$bitness"ifdc_zicsr "$testfile"
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then
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echo "TIMEOUT: $testfile"
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error=1
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else
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echo "SUCCESS: $testfile"
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fi
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done
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exit $error

ci-tests/snippy-tests/atomic.yaml

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options:
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mattr: +a
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num-instrs: 1000
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entry-point: SNIPPY_ENTRY
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model-plugin: None
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sections:
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- name: 0
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VMA: 0x80000000
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SIZE: 0x10000
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LMA: 0x80000000
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ACCESS: r
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- name: 1
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VMA: 0x80020000
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SIZE: 0x20000
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LMA: 0x80020000
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ACCESS: rx
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- name: 2
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VMA: 0x80040000
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SIZE: 0x10000
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LMA: 0x80040000
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ACCESS: rw
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- name: stack
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VMA: 0x80050000
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SIZE: 0x10000
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LMA: 0x80050000
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ACCESS: rw
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histogram:
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- ["AMOADD_[WD].*", 1.0]
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- ["AMOAND_[WD].*", 1.0]
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- ["AMOMAXU_[WD].*", 1.0]
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- ["AMOMAX_[WD].*", 1.0]
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- ["AMOMINU_[WD].*", 1.0]
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- ["AMOMIN_[WD].*", 1.0]
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- ["AMOOR_[WD].*", 1.0]
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- ["AMOSWAP_[WD].*", 1.0]
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- ["AMOXOR_[WD].*", 1.0]
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- ["ADD", 1.0]
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- ["ADDI", 1.0]
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- ["AND", 1.0]
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- ["ANDI", 1.0]
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- ["AUIPC", 1.0]
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- ["BEQ", 3.0]
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- ["BGE", 3.0]
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- ["BGEU", 3.0]
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- ["BLT", 3.0]
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- ["BLTU", 3.0]
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- ["BNE", 3.0]
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- ["L[BHWD][U]?", 1.0]
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- ["S[BHWD]", 1.0]
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- ["LUI", 1.0]
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- ["OR", 1.0]
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- ["ORI", 1.0]
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- ["SLL", 1.0]
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- ["SLLI", 1.0]
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- ["SLT", 1.0]
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- ["SLTI", 1.0]
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- ["SLTIU", 1.0]
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- ["SLTU", 1.0]
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- ["SRA", 1.0]
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- ["SRAI", 1.0]
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- ["SRL", 1.0]
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- ["SRLI", 1.0]
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- ["SUB", 1.0]
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- ["XOR", 1.0]
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- ["XORI", 1.0]

ci-tests/snippy-tests/basic.yaml

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options:
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num-instrs: 1000
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entry-point: SNIPPY_ENTRY
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model-plugin: None
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sections:
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- name: 0
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VMA: 0x80000000
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SIZE: 0x10000
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LMA: 0x80000000
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ACCESS: r
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- name: 1
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VMA: 0x80020000
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SIZE: 0x20000
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LMA: 0x80020000
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ACCESS: rx
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- name: 2
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VMA: 0x80040000
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SIZE: 0x10000
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LMA: 0x80040000
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ACCESS: rw
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- name: stack
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VMA: 0x80050000
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SIZE: 0x10000
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LMA: 0x80050000
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ACCESS: rw
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histogram:
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- ["ADD", 1.0]
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- ["ADDI", 1.0]
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- ["AND", 1.0]
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- ["ANDI", 1.0]
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- ["AUIPC", 1.0]
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- ["BEQ", 3.0]
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- ["BGE", 3.0]
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- ["BGEU", 3.0]
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- ["BLT", 3.0]
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- ["BLTU", 3.0]
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- ["BNE", 3.0]
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- ["L[BHWD][U]?", 1.0]
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- ["S[BHWD]", 1.0]
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- ["LUI", 1.0]
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- ["OR", 1.0]
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- ["ORI", 1.0]
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- ["SLL", 1.0]
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- ["SLLI", 1.0]
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- ["SLT", 1.0]
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- ["SLTI", 1.0]
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- ["SLTIU", 1.0]
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- ["SLTU", 1.0]
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- ["SRA", 1.0]
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- ["SRAI", 1.0]
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- ["SRL", 1.0]
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- ["SRLI", 1.0]
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- ["SUB", 1.0]
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- ["XOR", 1.0]
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- ["XORI", 1.0]
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.option norvc
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.global _entry
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.global fromhost
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.global tohost
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.text
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_entry:
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la t0, exception_handler
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csrw mtvec, t0
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csrr t1, mstatus
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# Setting bit number 13 (mstatus.FS)
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li t3, 1
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slli t3, t3, 13
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or t1, t1, t3
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csrw mstatus, t1
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la t0, SNIPPY_ENTRY
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jalr t0
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exception_handler:
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csrr x10, mcause
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# In case of breakpoint (Interrupt = 0, Exception code = 3) we finalize.
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# Otherwise it's not the expected behavior and we go into an infinite loop.
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li x11, 3
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beq x10, x11, exit
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j infinite_loop
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exit:
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li ra, 1
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la sp, tohost
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sw ra, 0(sp)
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infinite_loop:
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j infinite_loop
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.balign 64
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tohost:
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.8byte 0x0
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.balign 64
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fromhost:
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.8byte 0x0

ci-tests/snippy-tests/boot-code.s

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.option norvc
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.global _entry
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.global fromhost
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.global tohost
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.text
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_entry:
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la t0, exception_handler
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csrw mtvec, t0
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la t0, SNIPPY_ENTRY
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jalr t0
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j exit
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exception_handler:
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csrr x10, mcause
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# In case of breakpoint (Interrupt = 0, Exception code = 3) we finalize.
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# Otherwise it's not the expected behavior and we go into an infinite loop.
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li x11, 3
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beq x10, x11, exit
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j infinite_loop
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exit:
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li ra, 1
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la sp, tohost
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sw ra, 0(sp)
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infinite_loop:
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j infinite_loop
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.balign 64
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tohost:
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.8byte 0x0
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fromhost:
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.8byte 0x0
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options:
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mattr: +c
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num-instrs: 1000
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entry-point: SNIPPY_ENTRY
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model-plugin: None
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sections:
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- name: 0
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VMA: 0x80000000
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SIZE: 0x10000
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LMA: 0x80000000
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ACCESS: r
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- name: 1
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VMA: 0x80020000
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SIZE: 0x20000
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LMA: 0x80020000
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ACCESS: rx
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- name: 2
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VMA: 0x80040000
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SIZE: 0x10000
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LMA: 0x80040000
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ACCESS: rw
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- name: stack
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VMA: 0x80050000
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SIZE: 0x10000
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LMA: 0x80050000
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ACCESS: rw
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histogram:
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- ["C_ADD.*", 1.0]
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- ["C_AND", 1.0]
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- ["C_ANDI", 1.0]
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- ["C_BEQZ", 5.0]
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- ["C_BNEZ", 5.0]
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- ["C_L[WD]", 1.0]
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- ["C_S[WD]", 1.0]
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- ["C_LI", 1.0]
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- ["C_LUI", 1.0]
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- ["C_MV", 1.0]
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- ["C_OR", 1.0]
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- ["C_SLLI", 1.0]
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- ["C_SRAI", 1.0]
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- ["C_SRLI", 1.0]
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- ["C_SUB[W]?", 1.0]
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- ["C_XOR", 1.0]
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- ["ADD", 1.0]
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- ["ADDI", 1.0]
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- ["AND", 1.0]
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- ["ANDI", 1.0]
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- ["AUIPC", 1.0]
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- ["BEQ", 3.0]
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- ["BGE", 3.0]
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- ["BGEU", 3.0]
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- ["BLT", 3.0]
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- ["BLTU", 3.0]
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- ["BNE", 3.0]
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- ["L[BHWD][U]?", 1.0]
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- ["S[BHWD]", 1.0]
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- ["LUI", 1.0]
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- ["OR", 1.0]
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- ["ORI", 1.0]
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- ["SB", 1.0]
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- ["SH", 1.0]
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- ["SLL", 1.0]
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- ["SLLI", 1.0]
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- ["SLT", 1.0]
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- ["SLTI", 1.0]
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- ["SLTIU", 1.0]
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- ["SLTU", 1.0]
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- ["SRA", 1.0]
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- ["SRAI", 1.0]
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- ["SRL", 1.0]
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- ["SRLI", 1.0]
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- ["SUB", 1.0]
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- ["XOR", 1.0]
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- ["XORI", 1.0]

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