AIA: refactor APLIC init

Author: i2h2

riscv/aplic.cc

@@ -3,6 +3,7 @@
 #include "processor.h"
 #include "arith.h"
 #include "sim.h"
+#include "dts.h"
 
 #define DOMAINCFG       0x0
 #define SOURCECFG_BASE  0x4
@@ -39,7 +40,7 @@
 #define TARGET_GUEST_MASK       0x3f000
 #define TARGET_EIID_MASK        0x7ff
 
-aplic_t::aplic_t(std::vector<processor_t*>& procs, aplic_t *parent) : procs(procs), parent(parent), child(nullptr), domaincfg((0x80 << 24) | DOMAINCFG_DM_MASK), sourcecfg(), mmsiaddrcfgh(MMSIADDRCFGH_L_MASK), ie(), target(), level(), genmsi(0), deleg_mask()
+aplic_t::aplic_t(const simif_t *simif, aplic_t *parent) : simif(simif), parent(parent), child(nullptr), domaincfg((0x80 << 24) | DOMAINCFG_DM_MASK), sourcecfg(), mmsiaddrcfgh(MMSIADDRCFGH_L_MASK), ie(), target(), level(), genmsi(0), deleg_mask()
 {
 }
 
@@ -113,10 +114,12 @@ void aplic_t::set_interrupt_level(uint32_t id, int lvl)
 
 void aplic_t::send_msi(uint32_t proc_id, uint32_t guest, uint32_t eiid)
 {
-  if (!eiid || proc_id >= procs.size())
+  auto &procs = simif->get_harts();
+  auto it = procs.find(proc_id);
+  if (!eiid || it == procs.end())
     return;
 
-  auto proc = procs[proc_id];
+  processor_t *proc = it->second;
   if (!parent) {
     proc->imsic->m->pendei(eiid);
   } else if (guest) {
@@ -255,7 +258,7 @@ bool aplic_t::store(reg_t addr, size_t len, const uint8_t* bytes)
   return true;
 }
 
-std::string aplic_generate_dts(const sim_t* sim, const std::vector<std::string>& sargs UNUSED)
+std::string aplic_m_generate_dts(const sim_t* sim, const std::vector<std::string>& sargs UNUSED)
 {
   auto cfg = sim->get_cfg();
   isa_parser_t isa(cfg.isa, cfg.priv);
@@ -273,6 +276,14 @@ std::string aplic_generate_dts(const sim_t* sim, const std::vector<std::string>&
          "      compatible = \"riscv,aplic\";\n"
          "    };\n";
   }
+  return s.str();
+}
+
+std::string aplic_s_generate_dts(const sim_t* sim, const std::vector<std::string>& sargs UNUSED)
+{
+  auto cfg = sim->get_cfg();
+  isa_parser_t isa(cfg.isa, cfg.priv);
+  std::stringstream s;
   if (isa.extension_enabled(EXT_SSAIA)) {
     s << std::hex
       << "    APLIC_S: aplic@" << APLIC_S_BASE << " {\n"
@@ -287,9 +298,31 @@ std::string aplic_generate_dts(const sim_t* sim, const std::vector<std::string>&
   return s.str();
 }
 
-aplic_t* aplic_parse_from_fdt(const void* fdt, const sim_t* sim, reg_t* base, const std::vector<std::string>& sargs UNUSED)
+aplic_m_t* aplic_m_parse_from_fdt(const void* fdt, const sim_t* sim, reg_t* base, const std::vector<std::string>& sargs UNUSED)
 {
+  reg_t aplic_m_base, aplic_s_base;
+  if (fdt_parse_aplic(fdt, &aplic_m_base, &aplic_s_base, "riscv,aplic") == 0) {
+    if (aplic_m_base) {
+      *base = aplic_m_base;
+      return new aplic_m_t(sim, nullptr);
+    }
+  }
   return nullptr;
 }
 
-REGISTER_DEVICE(aplic, aplic_parse_from_fdt, aplic_generate_dts)
+aplic_s_t* aplic_s_parse_from_fdt(const void* fdt, const sim_t* sim, reg_t* base, const std::vector<std::string>& sargs UNUSED)
+{
+  reg_t aplic_m_base, aplic_s_base;
+  if (fdt_parse_aplic(fdt, &aplic_m_base, &aplic_s_base, "riscv,aplic") == 0) {
+    if (aplic_s_base) {
+      *base = aplic_s_base;
+      auto *ptr = new aplic_s_t(sim, sim->aplic_m.get());
+      if (sim->aplic_m)
+        sim->aplic_m->set_child(ptr);
+      return ptr;
+    }
+  }
+  return nullptr;
+}
+REGISTER_DEVICE(aplic_m, aplic_m_parse_from_fdt, aplic_m_generate_dts)
+REGISTER_DEVICE(aplic_s, aplic_s_parse_from_fdt, aplic_s_generate_dts)

riscv/devices.h

@@ -162,7 +162,7 @@ class plic_t : public abstract_device_t, public abstract_interrupt_controller_t
 #define APLIC_MAX_DEVICES 1024
 class aplic_t : public abstract_device_t, public abstract_interrupt_controller_t {
  public:
-  aplic_t(std::vector<processor_t*>&, aplic_t *parent);
+  aplic_t(const simif_t*, aplic_t *parent);
   bool load(reg_t addr, size_t len, uint8_t* bytes);
   bool store(reg_t addr, size_t len, const uint8_t* bytes);
   void set_interrupt_level(uint32_t id, int lvl);
@@ -172,7 +172,7 @@ class aplic_t : public abstract_device_t, public abstract_interrupt_controller_t
   bool delegated(uint32_t id);
   uint32_t get_deleg_mask(uint32_t idx);
  private:
-  std::vector<processor_t*>& procs;
+  const simif_t *simif;
   class aplic_t *parent;
   class aplic_t *child;
   uint32_t domaincfg;
@@ -192,6 +192,14 @@ class aplic_t : public abstract_device_t, public abstract_interrupt_controller_t
   void update_interrupt(uint32_t id);
   void update_interrupt_masked(uint32_t idx, uint32_t mask);
 };
+class aplic_m_t : public aplic_t {
+ public:
+  aplic_m_t(const simif_t* simif, aplic_t *parent) : aplic_t(simif, parent) {}
+};
+class aplic_s_t : public aplic_t {
+ public:
+  aplic_s_t(const simif_t* simif, aplic_t *parent) : aplic_t(simif, parent) {}
+};
 
 class ns16550_t : public abstract_device_t {
  public:

riscv/sim.cc

@@ -35,7 +35,8 @@ const size_t sim_t::INTERLEAVE;
 
 extern device_factory_t* clint_factory;
 extern device_factory_t* plic_factory;
-extern device_factory_t* aplic_factory;
+extern device_factory_t* aplic_m_factory;
+extern device_factory_t* aplic_s_factory;
 extern device_factory_t* ns16550_factory;
 extern device_factory_t* imsic_mmio_factory;
 
@@ -124,7 +125,8 @@ sim_t::sim_t(const cfg_t *cfg, bool halted,
     {clint_factory, {}},
     {plic_factory, {}},
     {imsic_mmio_factory, {}},
-    {aplic_factory, {}},
+    {aplic_m_factory, {}},
+    {aplic_s_factory, {}},
     {ns16550_factory, {}}};
   device_factories.insert(device_factories.end(),
                           plugin_device_factories.begin(),
@@ -278,21 +280,6 @@ sim_t::sim_t(const cfg_t *cfg, bool halted,
     }
   }
 
-  // create aplic
-  reg_t aplic_m_base, aplic_s_base;
-  if (fdt_parse_aplic(fdt, &aplic_m_base, &aplic_s_base, "riscv,aplic") == 0) {
-    if (aplic_m_base) {
-      aplic_m.reset(new aplic_t(procs, nullptr));
-      bus.add_device(aplic_m_base, aplic_m.get());
-    }
-    if (aplic_s_base) {
-      aplic_s.reset(new aplic_t(procs, aplic_m.get()));
-      bus.add_device(aplic_s_base, aplic_s.get());
-      if (aplic_m)
-        aplic_m->set_child(aplic_s.get());
-    }
-  }
-
   // must be located after procs/harts are set (devices might use sim_t get_* member functions)
   for (size_t i = 0; i < device_factories.size(); i++) {
     const device_factory_t* factory = device_factories[i].first;
@@ -313,6 +300,15 @@ sim_t::sim_t(const cfg_t *cfg, bool halted,
         assert(!plic);
         plic = std::static_pointer_cast<plic_t>(dev_ptr);
       }
+
+      if (dynamic_cast<aplic_m_t*>(&*dev_ptr)) {
+        assert(!aplic_m);
+        aplic_m = std::static_pointer_cast<aplic_m_t>(dev_ptr);
+      }
+      if (dynamic_cast<aplic_s_t*>(&*dev_ptr)) {
+        assert(!aplic_s);
+        aplic_s = std::static_pointer_cast<aplic_s_t>(dev_ptr);
+      }
     }
   }
 }

riscv/sim.h

@@ -73,6 +73,8 @@ class sim_t : public htif_t, public simif_t
   static const size_t INSNS_PER_RTC_TICK = 100; // 10 MHz clock for 1 BIPS core
   static const size_t CPU_HZ = 1000000000; // 1GHz CPU
 
+  std::shared_ptr<aplic_m_t> aplic_m;
+  std::shared_ptr<aplic_s_t> aplic_s;
 private:
   const cfg_t * const cfg;
   std::vector<std::pair<reg_t, abstract_mem_t*>> mems;
@@ -85,8 +87,6 @@ class sim_t : public htif_t, public simif_t
   std::vector<std::shared_ptr<abstract_device_t>> devices;
   std::shared_ptr<clint_t> clint;
   std::shared_ptr<plic_t> plic;
-  std::shared_ptr<aplic_t> aplic_m;
-  std::shared_ptr<aplic_t> aplic_s;
   bus_t bus;
   log_file_t log_file;