Rename VI_VFP_WF_LOOP_MINI_WIDE to VI_VFP_WF_LOOP_WIDE

Author: rbuchner-aril

riscv/insns/vfwadd_wf.h

@@ -1,5 +1,5 @@
 // vfwadd.wf vd, vs2, vs1
-VI_VFP_WF_LOOP_MINI_WIDE
+VI_VFP_WF_LOOP_WIDE
 ({
   vd = f16_add(vs2, rs1);
 },

riscv/insns/vfwsub_wf.h

@@ -1,5 +1,5 @@
 // vfwsub.wf vd, vs2, rs1
-VI_VFP_WF_LOOP_MINI_WIDE
+VI_VFP_WF_LOOP_WIDE
 ({
   vd = f16_sub(vs2, rs1);
 },

riscv/v_ext_macros.h

@@ -1934,7 +1934,7 @@ reg_t index[P.VU.vlmax]; \
   DEBUG_RVV_FP_VV; \
   VI_VFP_LOOP_END
 
-#define VI_VFP_WF_LOOP_MINI_WIDE(BODY8, BODY16, BODY32) \
+#define VI_VFP_WF_LOOP_WIDE(BODY8, BODY16, BODY32) \
   VI_CHECK_DDS(false); \
   VI_VFP_LOOP_BASE \
   switch (P.VU.vsew) { \
@@ -1968,32 +1968,6 @@ reg_t index[P.VU.vlmax]; \
   DEBUG_RVV_FP_VV; \
   VI_VFP_LOOP_END
 
-#define VI_VFP_WF_LOOP_WIDE(BODY16, BODY32) \
-  VI_CHECK_DDS(false); \
-  VI_VFP_LOOP_BASE \
-  switch (P.VU.vsew) { \
-    case e16: { \
-      float32_t &vd = P.VU.elt<float32_t>(rd_num, i, true); \
-      float32_t vs2 = P.VU.elt<float32_t>(rs2_num, i); \
-      float32_t rs1 = f16_to_f32(FRS1_H); \
-      BODY16; \
-      set_fp_exceptions; \
-      break; \
-    } \
-    case e32: { \
-      float64_t &vd = P.VU.elt<float64_t>(rd_num, i, true); \
-      float64_t vs2 = P.VU.elt<float64_t>(rs2_num, i); \
-      float64_t rs1 = f32_to_f64(FRS1_F); \
-      BODY32; \
-      set_fp_exceptions; \
-      break; \
-    } \
-    default: \
-      require(0); \
-  }; \
-  DEBUG_RVV_FP_VV; \
-  VI_VFP_LOOP_END
-
 #define VI_VFP_WV_LOOP_WIDE(BODY8, BODY16, BODY32)  \
   VI_CHECK_DDS(true); \
   VI_VFP_LOOP_BASE \