AIA: check H extension before reading hvictl

Author: i2h2

riscv/csrs.cc

@@ -890,7 +890,7 @@ mip_proxy_csr_t::mip_proxy_csr_t(processor_t* const proc, const reg_t addr, gene
 
 void mip_proxy_csr_t::verify_permissions(insn_t insn, bool write) const {
   csr_t::verify_permissions(insn, write);
-  if ((state->csrmap[CSR_HVICTL]->read() & HVICTL_VTI) &&
+  if (proc->extension_enabled('H') && (state->csrmap[CSR_HVICTL]->read() & HVICTL_VTI) &&
       proc->extension_enabled('S') && state->v)
     throw trap_virtual_instruction(insn.bits()); // VS-mode attempts to access sip when hvictl.VTI=1
 }
@@ -912,7 +912,7 @@ mie_proxy_csr_t::mie_proxy_csr_t(processor_t* const proc, const reg_t addr, gene
 
 void mie_proxy_csr_t::verify_permissions(insn_t insn, bool write) const {
   csr_t::verify_permissions(insn, write);
-  if ((state->csrmap[CSR_HVICTL]->read() & HVICTL_VTI) &&
+  if (proc->extension_enabled('H') && (state->csrmap[CSR_HVICTL]->read() & HVICTL_VTI) &&
       proc->extension_enabled('S') && state->v)
     throw trap_virtual_instruction(insn.bits()); // VS-mode attempts to access sie when hvictl.VTI=1
 }
@@ -1731,7 +1731,7 @@ void stimecmp_csr_t::verify_permissions(insn_t insn, bool write) const {
 
   basic_csr_t::verify_permissions(insn, write);
 
-  if ((state->csrmap[CSR_HVICTL]->read() & HVICTL_VTI) && state->v && write)
+  if (proc->extension_enabled('H') && (state->csrmap[CSR_HVICTL]->read() & HVICTL_VTI) && state->v && write)
     throw trap_virtual_instruction(insn.bits());
 }