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1 parent 13d7aa9 commit c629231Copy full SHA for c629231
riscv/csrs.cc
@@ -1039,7 +1039,7 @@ reg_t wide_counter_csr_t::written_value() const noexcept {
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// Note that minstretcfg / mcyclecfg / mhpmevent* share the same inhibit bits.
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bool wide_counter_csr_t::is_counting_enabled() const noexcept {
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auto prv = state->prv_changed ? state->prev_prv : state->prv;
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- auto v = state->v_changed ? state->v : state->prev_v;
+ auto v = state->v_changed ? state->prev_v : state->v;
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auto mask = MHPMEVENT_MINH;
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if (prv == PRV_S) {
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mask = v ? MHPMEVENT_VSINH : MHPMEVENT_SINH;
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