Skip to content

Commit cce834e

Browse files
committed
Support Ziccid extension
1 parent b6a061b commit cce834e

File tree

3 files changed

+11
-1
lines changed

3 files changed

+11
-1
lines changed

disasm/isa_parser.cc

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -140,6 +140,8 @@ isa_parser_t::isa_parser_t(const char* str, const char *priv)
140140
// HINTs encoded in base-ISA instructions are always present.
141141
} else if (ext_str == "zihintntl") {
142142
// HINTs encoded in base-ISA instructions are always present.
143+
} else if (ext_str == "ziccid") {
144+
extension_table[EXT_ZICCID] = true;
143145
} else if (ext_str == "ziccif") {
144146
// aligned instruction fetch is always atomic in Spike
145147
} else if (ext_str == "zaamo") {

riscv/execute.cc

Lines changed: 8 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -210,6 +210,8 @@ bool processor_t::slow_path() const
210210
// fetch/decode/execute loop
211211
void processor_t::step(size_t n)
212212
{
213+
mmu_t* _mmu = mmu;
214+
213215
if (!state.debug_mode) {
214216
if (halt_request == HR_REGULAR) {
215217
enter_debug_mode(DCSR_CAUSE_DEBUGINT, 0);
@@ -221,10 +223,15 @@ void processor_t::step(size_t n)
221223
}
222224
}
223225

226+
if (extension_enabled(EXT_ZICCID)) {
227+
// Ziccid requires stores eventually become visible to instruction fetch,
228+
// so periodically flush the I$
229+
_mmu->flush_icache();
230+
}
231+
224232
while (n > 0) {
225233
size_t instret = 0;
226234
reg_t pc = state.pc;
227-
mmu_t* _mmu = mmu;
228235
state.prv_changed = false;
229236
state.v_changed = false;
230237

riscv/isa_parser.h

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -50,6 +50,7 @@ typedef enum {
5050
EXT_ZFINX,
5151
EXT_ZHINX,
5252
EXT_ZHINXMIN,
53+
EXT_ZICCID,
5354
EXT_ZICBOM,
5455
EXT_ZICBOZ,
5556
EXT_ZICNTR,

0 commit comments

Comments
 (0)