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Merge pull request #134 from riscv-software-src/trap_on_reserved
Add TRAP_ON_RESERVED_INSTRUCTION
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arch/ext/Sm.yaml

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@@ -291,9 +291,18 @@ Sm:
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type: boolean
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TRAP_ON_UNIMPLEMENTED_INSTRUCTION:
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description: |
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When true, fetching an unimplemented instruction will cause an `IllegalInstruction` exception.
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When true, fetching an unimplemented instruction from the custom encoding space will cause
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an `IllegalInstruction` exception.
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When false, fetching an unimplemented instruction is `unpredictable`.
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When false, fetching an unimplemented instruction is `UNPREDICTABLE`.
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schema:
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type: boolean
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TRAP_ON_RESERVED_INSTRUCTION:
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description: |
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When true, fetching an unimplemented and/or undefined instruction from the standard/reserved
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encoding space will cause an `IllegalInstruction` exception.
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When false, fetching such an instruction is `UNPREDICTABLE`.
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schema:
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type: boolean
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TRAP_ON_UNIMPLEMENTED_CSR:

cfgs/generic_rv64/params.yaml

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# when false, writing an illegal value to a WLRL CSR field is ignored
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TRAP_ON_ILLEGAL_WLRL: true
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TRAP_ON_UNIMPLEMENTED_INSTRUCTION: true
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TRAP_ON_RESERVED_INSTRUCTION: true
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TRAP_ON_UNIMPLEMENTED_CSR: true
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# Whether or not a real hardware `time` CSR exists. Implementations can either provide a real

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