Merge pull request #384 from riscv-software-src/xqciv0p5

Xqci spec: add fixes for reported issues, update spec version to 0.5.0

Author: dhower-qc

cfgs/qc_iu/arch_overlay/csr/Xqci/qc_flags.yaml

@@ -8,7 +8,10 @@ base: 32
 length: 32
 description: |
   Condition Code Register with condition codes, plus a co-processor flags (_e.g._, to support floating point)
-definedBy: Xqci
+definedBy:
+  anyOf:
+    - Xqci
+    - Xqciint
 fields:
   CPFLAGS:
     location: 31-16

cfgs/qc_iu/arch_overlay/csr/Xqci/qc_mclicie0.yaml

@@ -8,7 +8,10 @@ address: 0x7f0
 length: 32
 base: 32
 priv_mode: M
-definedBy: Xqci
+definedBy:
+  anyOf:
+    - Xqci
+    - Xqciint
 description: |
   Enable bits for IRQs 0-31
 fields:

cfgs/qc_iu/arch_overlay/csr/Xqci/qc_mclicie1.yaml

@@ -8,7 +8,10 @@ address: 0x7f1
 length: 32
 base: 32
 priv_mode: M
-definedBy: Xqci
+definedBy:
+  anyOf:
+    - Xqci
+    - Xqciint
 description: |
   Enable bits for IRQs 32-63
 fields:

cfgs/qc_iu/arch_overlay/csr/Xqci/qc_mclicie2.yaml

@@ -8,7 +8,10 @@ address: 0x7f2
 length: 32
 base: 32
 priv_mode: M
-definedBy: Xqci
+definedBy:
+  anyOf:
+    - Xqci
+    - Xqciint
 description: |
   Enable bits for IRQs 64-95
 fields:

cfgs/qc_iu/arch_overlay/csr/Xqci/qc_mclicie3.yaml

@@ -8,7 +8,10 @@ address: 0x7f3
 length: 32
 base: 32
 priv_mode: M
-definedBy: Xqci
+definedBy:
+  anyOf:
+    - Xqci
+    - Xqciint
 description: |
   Enable bits for IRQs 96-127
 fields:

cfgs/qc_iu/arch_overlay/csr/Xqci/qc_mclicie4.yaml

@@ -8,7 +8,10 @@ address: 0x7f4
 length: 32
 base: 32
 priv_mode: M
-definedBy: Xqci
+definedBy:
+  anyOf:
+    - Xqci
+    - Xqciint
 description: |
   Enable bits for IRQs 128-159
 fields:

cfgs/qc_iu/arch_overlay/csr/Xqci/qc_mclicie5.yaml

@@ -8,7 +8,10 @@ address: 0x7f5
 length: 32
 base: 32
 priv_mode: M
-definedBy: Xqci
+definedBy:
+  anyOf:
+    - Xqci
+    - Xqciint
 description: |
   Enable bits for IRQs 160-191
 fields:

cfgs/qc_iu/arch_overlay/csr/Xqci/qc_mclicie6.yaml

@@ -8,7 +8,10 @@ address: 0x7f6
 length: 32
 base: 32
 priv_mode: M
-definedBy: Xqci
+definedBy:
+  anyOf:
+    - Xqci
+    - Xqciint
 description: |
   Enable bits for IRQs 192-223
 fields:

cfgs/qc_iu/arch_overlay/csr/Xqci/qc_mclicie7.yaml

@@ -8,7 +8,10 @@ address: 0x7f7
 length: 32
 base: 32
 priv_mode: M
-definedBy: Xqci
+definedBy:
+  anyOf:
+    - Xqci
+    - Xqciint
 description: |
   Enable bits for IRQs 224-255
 fields:

cfgs/qc_iu/arch_overlay/csr/Xqci/qc_mclicip0.yaml

@@ -8,7 +8,10 @@ address: 0x7f0
 length: 32
 priv_mode: M
 base: 32
-definedBy: Xqci
+definedBy:
+  anyOf:
+    - Xqci
+    - Xqciint
 description: |
   Pending bits for IRQs 0-31
 fields: