Merge pull request #440 from ShashankVM/main

Floating point addition and subtraction code addition

Author: ShashankVM

arch/inst/F/fadd.s.yaml

@@ -3,9 +3,10 @@
 $schema: "inst_schema.json#"
 kind: instruction
 name: fadd.s
-long_name: No synopsis available.
+long_name: Single-precision floating-point addition
 description: |
-  No description available.
+  Do the single-precision floating-point addition of fs1 and fs2 and store the result in fd.
+  rm is the dynamic Rounding Mode.
 definedBy: F
 assembly: fd, fs1, fs2, rm
 encoding:

arch/inst/F/fsub.s.yaml

@@ -3,9 +3,10 @@
 $schema: "inst_schema.json#"
 kind: instruction
 name: fsub.s
-long_name: No synopsis available.
+long_name: Single-precision floating-point subtraction
 description: |
-  No description available.
+  Do the single-precision floating-point subtraction of fs2 from fs1 and store the result in fd.
+  rm is the dynamic Rounding Mode.
 definedBy: F
 assembly: fd, fs1, fs2, rm
 encoding:
@@ -26,7 +27,8 @@ access:
   vu: always
 data_independent_timing: true
 operation(): |
-
+  RoundingMode mode = rm_to_mode(X[rm], $encoding);
+  X[fd] = f32_sub(X[fs1], X[fs2], mode);
 sail(): |
   {
     let rs1_val_32b = F_or_X_S(rs1);

arch/isa/fp.idl

@@ -861,3 +861,24 @@ function f32_add {
     }
   }
 }
+
+function f32_sub {
+  returns U32
+  arguments
+    U32 a,
+    U32 b,
+    RoundingMode mode
+  description {
+    Returns difference of 2 floating point numbers
+  }
+  body {
+    U32 a_xor_b = a ^ b;
+    if (signF32UI(a_xor_b) == 1) {
+      # add if signs are different
+      return softfloat_addMagsF32(a,b,mode);
+    } else {
+      # subtract if signs are the same
+      return softfloat_subMagsF32(a,b,mode);
+    }
+  }
+}