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Merge branch 'main' into csr_link
2 parents 8285391 + 1a3adb8 commit 828d3c4

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-4
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arch/csr/hstatus.yaml

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -133,10 +133,10 @@ hstatus:
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When `hstatus.VGEIN` != 0, it selects which bit of `hgeip` is currently active in VS-mode.
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type(): |
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# if NUM_EXTERNAL_GUEST_INTERRUPTS+1 is a power of two (beacuse indexing in `hgeip` starts at 1),
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# if NUM_EXTERNAL_GUEST_INTERRUPTS+1 is 63 (beacuse indexing in `hgeip` starts at 1),
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# then the field accepts any value.
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# Otherwise, it accepts a restricted set of values
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if (power_of_2?<6>(NUM_EXTERNAL_GUEST_INTERRUPTS + 1)) {
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if (NUM_EXTERNAL_GUEST_INTERRUPTS == 63) {
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return CsrFieldType::RW;
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} else {
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return CsrFieldType::RWR;

arch/ext/Sm.yaml

Lines changed: 11 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -291,9 +291,18 @@ Sm:
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type: boolean
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TRAP_ON_UNIMPLEMENTED_INSTRUCTION:
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description: |
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When true, fetching an unimplemented instruction will cause an `IllegalInstruction` exception.
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When true, fetching an unimplemented instruction from the custom encoding space will cause
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an `IllegalInstruction` exception.
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When false, fetching an unimplemented instruction is `unpredictable`.
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When false, fetching an unimplemented instruction is `UNPREDICTABLE`.
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schema:
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type: boolean
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TRAP_ON_RESERVED_INSTRUCTION:
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description: |
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When true, fetching an unimplemented and/or undefined instruction from the standard/reserved
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encoding space will cause an `IllegalInstruction` exception.
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When false, fetching such an instruction is `UNPREDICTABLE`.
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schema:
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type: boolean
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TRAP_ON_UNIMPLEMENTED_CSR:

cfgs/generic_rv64/params.yaml

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -234,6 +234,7 @@ params:
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# when false, writing an illegal value to a WLRL CSR field is ignored
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TRAP_ON_ILLEGAL_WLRL: true
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TRAP_ON_UNIMPLEMENTED_INSTRUCTION: true
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TRAP_ON_RESERVED_INSTRUCTION: true
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TRAP_ON_UNIMPLEMENTED_CSR: true
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# Whether or not a real hardware `time` CSR exists. Implementations can either provide a real

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