Add DCSR and DPC CSRs

arch/csr/dcsr.yaml

@@ -127,34 +127,70 @@ fields:
     reset_value: 0
   STEPIE:
     location: 11
-    type: RW
     description: |
       0 (interrupts disabled):: Interrupts (including NMI) are disabled during single stepping with step set.
       This value should be supported.
       1 (interrupts enabled):: Interrupts (including NMI) are enabled during single stepping with step set.
       Implementations may hard wire this bit to 0. In that case interrupt behavior can be emulated by the
       debugger. The debugger must not change the value of this bit while the hart is running.
-    reset_value: 0
+    type(): |
+      if (DCSR_STEPIE_TYPE == "tied-to-0" || DCSR_STEPIE_TYPE == "tied-to-1") {
+        return CsrFieldType::RO;
+      } else if (DCSR_STEPIE_TYPE == "rw") {
+        return CsrFieldType::RW;
+      }
+    reset_value(): |
+      if (DCSR_STEPIE_TYPE == "tied-to-0") {
+        return 0;
+      } else if (DCSR_STEPIE_TYPE == "tied-to-1") {
+        return 1;
+      } else if (DCSR_STEPIE_TYPE == "rw") {
+        return UNDEFINED_LEGAL;
+      }
   STOPCOUNT:
     location: 10
-    type: RW
     description: |
       0 (normal):: Increment counters as usual.
       1 (freeze):: Don’t increment any hart-local counters while in Debug Mode or on ebreak instructions
       that cause entry into Debug Mode. These counters include the instret CSR. On single-hart cores cycle
       should be stopped, but on multi-hart cores it must keep incrementing.
       An implementation may hardwire this bit to 0 or 1.
-    reset_value: UNDEFINED_LEGAL
+    type(): |
+      if (DCSR_STOPCOUNT_TYPE == "tied-to-0" || DCSR_STOPCOUNT_TYPE == "tied-to-1") {
+        return CsrFieldType::RO;
+      } else if (DCSR_STOPCOUNT_TYPE == "rw") {
+        return CsrFieldType::RW;
+      }
+    reset_value(): |
+      if (DCSR_STOPCOUNT_TYPE == "tied-to-0") {
+        return 0;
+      } else if (DCSR_STOPCOUNT_TYPE == "tied-to-1") {
+        return 1;
+      } else if (DCSR_STOPCOUNT_TYPE == "rw") {
+        return UNDEFINED_LEGAL;
+      }
   STOPTIME:
     location: 9
-    type: RW
     description: |
       0 (normal):: time continues to reflect mtime.
       1 (freeze):: time is frozen at the time that Debug Mode was entered. When leaving Debug Mode,
       time will reflect the latest value of mtime again.
       While all harts have stoptime=1 and are in Debug Mode, mtime is allowed to stop incrementing.
       An implementation may hardwire this bit to 0 or 1.
-    reset_value: UNDEFINED_LEGAL
+    type(): |
+      if (DCSR_STOPTIME_TYPE == "tied-to-0" || DCSR_STOPTIME_TYPE == "tied-to-1") {
+        return CsrFieldType::RO;
+      } else if (DCSR_STOPTIME_TYPE == "rw") {
+        return CsrFieldType::RW;
+      }
+    reset_value(): |
+      if (DCSR_STOPTIME_TYPE == "tied-to-0") {
+        return 0;
+      } else if (DCSR_STOPTIME_TYPE == "tied-to-1") {
+        return 1;
+      } else if (DCSR_STOPTIME_TYPE == "rw") {
+        return UNDEFINED_LEGAL;
+      }
   CAUSE:
     location: 8-6
     type: RO

arch/ext/Sdext.yaml

@@ -10,7 +10,7 @@ type: privileged
 versions:
   - version: "1.0.0"
     state: ratified
-    ratification_date: null
+    ratification_date: 2025-02
 params:
   DCSR_MPRVEN_TYPE:
     schema:
@@ -24,3 +24,39 @@ params:
         * 'tied-to-0': tied to 0
         * 'tied-to-1': tied to 1
         * 'rw': read-write
+  DCSR_STEPIE_TYPE:
+    schema:
+      type: string
+      enum: [tied-to-0, tied-to-1, rw]
+    description: |
+      Implementation of dcsr.STEPIE is optional.
+      It may be tied to either 0 or 1.
+
+      Behavior of the dcsr.STEPIE bit:
+        * 'tied-to-0': tied to 0
+        * 'tied-to-1': tied to 1
+        * 'rw': read-write
+  DCSR_STOPCOUNT_TYPE:
+    schema:
+      type: string
+      enum: [tied-to-0, tied-to-1, rw]
+    description: |
+      Implementation of dcsr.STOPCOUNT is optional.
+      It may be tied to either 0 or 1.
+
+      Behavior of the dcsr.STOPCOUNT bit:
+        * 'tied-to-0': tied to 0
+        * 'tied-to-1': tied to 1
+        * 'rw': read-write
+  DCSR_STOPTIME_TYPE:
+    schema:
+      type: string
+      enum: [tied-to-0, tied-to-1, rw]
+    description: |
+      Implementation of dcsr.STOPTIME is optional.
+      It may be tied to either 0 or 1.
+
+      Behavior of the dcsr.STOPTIME bit:
+        * 'tied-to-0': tied to 0
+        * 'tied-to-1': tied to 1
+        * 'rw': read-write