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Following ARC feedback, renaming Zvqdotq extension to Zvdot4a (as a pattern for Zvdot4a8i since encodings could be shared by other SEW(s)) and renaming vqdot instructions to vdot4a.

This change is made to comply with https://riscv.atlassian.net/browse/RVS-1971?focusedCommentId=21112.

This was tested using the following command:

$ RUNNER="PYTHONPATH=src python -m"  make &&  grep dot4 encoding.out.h                                                                    zvdot4a
DECLARE_INSN(vdot4a_vv, MATCH_VDOT4A_VV, MASK_VDOT4A_VV)
DECLARE_INSN(vdot4a_vx, MATCH_VDOT4A_VX, MASK_VDOT4A_VX)
DECLARE_INSN(vdot4asu_vv, MATCH_VDOT4ASU_VV, MASK_VDOT4ASU_VV)
DECLARE_INSN(vdot4asu_vx, MATCH_VDOT4ASU_VX, MASK_VDOT4ASU_VX)
DECLARE_INSN(vdot4au_vv, MATCH_VDOT4AU_VV, MASK_VDOT4AU_VV)
DECLARE_INSN(vdot4au_vx, MATCH_VDOT4AU_VX, MASK_VDOT4AU_VX)
DECLARE_INSN(vdot4aus_vx, MATCH_VDOT4AUS_VX, MASK_VDOT4AUS_VX)
``

Following ARC feedback, renaming Zvqdotq extension to Zvdot4a (as a pattern for Zvdot4a8i since encodings could be shared by other SEW)
and renaming vqdot instructions to vdot4a
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codecov bot commented Jan 17, 2026

Codecov Report

✅ All modified and coverable lines are covered by tests.
✅ Project coverage is 97.08%. Comparing base (4644ba3) to head (eb5c51c).
⚠️ Report is 1 commits behind head on master.

Additional details and impacted files
@@           Coverage Diff           @@
##           master     #402   +/-   ##
=======================================
  Coverage   97.08%   97.08%           
=======================================
  Files          14       14           
  Lines         926      926           
=======================================
  Hits          899      899           
  Misses         27       27           

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nibrunie added a commit to nibrunieAtSi5/riscv-isa-sim that referenced this pull request Jan 18, 2026
Folowing Architecture Review Committee's (ARC) recommendation
https://riscv.atlassian.net/browse/RVS-1971?focusedCommentId=21112
shared during the review of Zvqdotq, the extension and its instructions
are renamed.

Changelogs:
* Renaming extension Zvqdotq to Zvdot4a8i
* Renaming instructions vqdot* to vdot4a*
* Importing new encodings from riscv/riscv-opcodes#402
nibrunie added a commit to nibrunieAtSi5/riscv-isa-sim that referenced this pull request Jan 18, 2026
Folowing Architecture Review Committee's (ARC) recommendation
https://riscv.atlassian.net/browse/RVS-1971?focusedCommentId=21112
shared during the review of Zvqdotq, the extension and its instructions
are renamed.

Changelogs:
* Renaming extension Zvqdotq to Zvdot4a8i
* Renaming instructions vqdot* to vdot4a*
* Importing new encodings from riscv/riscv-opcodes#402
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2 participants