GitHub - rnz/verilog-sha256: Implementation of the SHA256 Algorithm in Verilog

Name		Name	Last commit message	Last commit date
Latest commit History 3 Commits
extension.v		extension.v
main_computation.v		main_computation.v
sha256_24bit.v		sha256_24bit.v
sha256_24bit_multi_chunks_output.v		sha256_24bit_multi_chunks_output.v
sha256_512bit_input.v		sha256_512bit_input.v
t_main_computation.v		t_main_computation.v
t_sha256_24bit.v		t_sha256_24bit.v
t_sha256_24bit_multi_chunks_output.v		t_sha256_24bit_multi_chunks_output.v
t_sha256_512bit_input.v		t_sha256_512bit_input.v